Scott Linder 6da9a35885 [AMDGPU] Legalize VGPR Rsrc operands for MUBUF instructions ...

Emit a waterfall loop in the general case for a potentially-divergent Rsrc
operand. When practical, avoid this by using Addr64 instructions.

Differential Revision: https://reviews.llvm.org/D50982


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341413 91177308-0d34-0410-b5e6-96231b3b80d8

2018-09-04 21:50:47 +00:00

..

AArch64

NFC: expand memset inline arm64 coverage

2018-09-04 21:02:00 +00:00

AMDGPU

[AMDGPU] Legalize VGPR Rsrc operands for MUBUF instructions

2018-09-04 21:50:47 +00:00

ARC

…

ARM

[MinGW] [ARM] Add stubs for potential automatic dllimported variables

2018-08-31 08:00:25 +00:00

AVR

[AVR] Redefine the 'LSL' instruction as an alias of 'ADD'

2018-09-01 12:23:00 +00:00

BPF

bpf: add missing RegState to notify MachineInstr verifier necessary register usage

2018-07-27 16:58:52 +00:00

Generic

[DWARF] Unclamp line table version on Darwin for v5 and later.

2018-08-08 21:16:50 +00:00

Hexagon

[Hexagon] Don't packetize new-value stores with any other stores

2018-09-04 21:07:27 +00:00

Inputs

…

Lanai

Remove SETCCE use from Lanai's backend

2018-06-03 12:56:24 +00:00

Mips

[mips] Disable the selection of mixed microMIPS/MIPS code

2018-09-03 20:48:55 +00:00

MIR

Consistently use MemoryLocation::UnknownSize to indicate unknown access size

2018-08-20 20:37:57 +00:00

MSP430

[DAGCombiner] Add X / X -> 1 & X % X -> 0 folds (test tweaks)

2018-08-29 11:18:14 +00:00

Nios2

[Nios2] Arithmetic instructions for R1 and R2 ISA.

2018-01-09 11:15:08 +00:00

NVPTX

[NVPTX] Implement isLegalToVectorizeLoadChain

2018-08-27 17:29:43 +00:00

PowerPC

[PowerPC] Add Itineraries of IIC_IntRotateDI for P7/P8

2018-09-03 03:14:29 +00:00

RISCV

[RISCV] atomic_store_nn have a different layout to regular store

2018-08-27 07:08:18 +00:00

SPARC

[Sparc] Use ANDN instead of AND if constant can be encoded more efficiently

2018-08-30 14:05:26 +00:00

SystemZ

[DAGCombiner] Add X / X -> 1 & X % X -> 0 folds (test tweaks)

2018-08-29 11:18:14 +00:00

Thumb

CodeGen: Make computeRegisterLiveness search forward first

2018-08-30 07:18:10 +00:00

Thumb2

[SelectionDAG] Improve the legalisation lowering of UMULO.

2018-08-16 18:39:39 +00:00

WebAssembly

[WebAssembly][NFC] Fix formatting and tests

2018-09-04 21:26:17 +00:00

WinCFGuard

Rename the cfguard module flag to cfguardtable

2018-08-10 09:48:53 +00:00

WinEH

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

X86

[x86/SLH] Add a real Clang flag and LLVM IR attribute for Speculative

2018-09-04 12:38:00 +00:00

XCore

[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)

2018-07-15 16:27:07 +00:00