Samuel Pitoiset 7226e5bf26 AMDGPU: bump AS.MAX_COMMON_ADDRESS to 6 since 32-bit addr space ...

32-bit constant address space is declared as 6, so the
maximum number of address spaces is 6, not 5.

Fixes "LLVM ERROR: Pointer address space out of range".

v5: rename MAX_COMMON_ADDRESS to MAX_AMDGPU_ADDRESS
v4: - fix compilation issues
    - fix out of bounds access
v3: use static_assert()
v2: add a very simple test for 32-bit addr space

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106630

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340417 91177308-0d34-0410-b5e6-96231b3b80d8

2018-08-22 16:08:48 +00:00

..

AArch64

[AArch64] Add Tiny Code Model for AArch64

2018-08-22 11:31:39 +00:00

AMDGPU

AMDGPU: bump AS.MAX_COMMON_ADDRESS to 6 since 32-bit addr space

2018-08-22 16:08:48 +00:00

ARC

…

ARM

[ARM] Rotated operand patterns for *xtb16

2018-08-22 12:58:36 +00:00

AVR

[AVR] Set trackLivenessAfterRegAlloc

2018-06-11 14:46:48 +00:00

BPF

bpf: add missing RegState to notify MachineInstr verifier necessary register usage

2018-07-27 16:58:52 +00:00

Generic

[DWARF] Unclamp line table version on Darwin for v5 and later.

2018-08-08 21:16:50 +00:00

Hexagon

Change how finalizeBundle selects debug location for the BUNDLE instruction

2018-08-21 10:59:50 +00:00

Inputs

…

Lanai

Remove SETCCE use from Lanai's backend

2018-06-03 12:56:24 +00:00

Mips

[mips] Handle missing CondCodes

2018-08-22 09:34:44 +00:00

MIR

Consistently use MemoryLocation::UnknownSize to indicate unknown access size

2018-08-20 20:37:57 +00:00

MSP430

Emit a left-shift instead of a power-of-two multiply for jump-tables

2018-05-16 08:58:26 +00:00

Nios2

[Nios2] Arithmetic instructions for R1 and R2 ISA.

2018-01-09 11:15:08 +00:00

NVPTX

[NVPTX] Remove ftz variants of cvt with rounding mode

2018-08-21 18:44:25 +00:00

PowerPC

Temporarily Revert "[PowerPC] Generate Power9 extswsli extend sign and shift immediate instruction" due to it causing a compiler crash on valid.

2018-08-21 18:35:08 +00:00

RISCV

[SelectionDAG] Improve the legalisation lowering of UMULO.

2018-08-16 18:39:39 +00:00

SPARC

[Sparc] Get sret arg size from CallLoweringInfo.getArgs()

2018-08-17 10:40:00 +00:00

SystemZ

[RegisterCoalscer] Manually remove leftover segments when commuting def

2018-08-21 19:01:26 +00:00

Thumb

[SelectionDAG] Improve the legalisation lowering of UMULO.

2018-08-16 18:39:39 +00:00

Thumb2

[SelectionDAG] Improve the legalisation lowering of UMULO.

2018-08-16 18:39:39 +00:00

WebAssembly

[WebAssembly] Restore __stack_pointer after catch instructions

2018-08-21 21:23:07 +00:00

WinCFGuard

Rename the cfguard module flag to cfguardtable

2018-08-10 09:48:53 +00:00

WinEH

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

X86

[X86][SSE] LowerMULH vXi8 - use SSE shifts directly.

2018-08-22 15:37:11 +00:00

XCore

[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)

2018-07-15 16:27:07 +00:00