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f5d0848f55
This patch allows target shuffles to be combined to single input immediate permute instructions - (V)PSHUFD/VPERMILPD/VPERMILPS - allowing more general pattern matching than what we current do and improves the likelihood of memory folding compared to existing patterns which tend to reuse the input in multiple arguments. Further permute instructions (V)PSHUFLW/(V)PSHUFHW/(V)PERMQ/(V)PERMPD may be added in the future but its proven tricky to create tests cases for them so far. (V)PSHUFLW/(V)PSHUFHW is already handled quite well in combineTargetShuffle so it may be that removing some of that code may allow us to perform more of the combining in one place without duplication. Differential Revision: http://reviews.llvm.org/D21148 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273999 91177308-0d34-0410-b5e6-96231b3b80d8
25 lines
1.4 KiB
LLVM
25 lines
1.4 KiB
LLVM
; RUN: llc < %s -mattr=+avx -mtriple=i686-pc-win32 | FileCheck %s
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define void @endless_loop() {
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; CHECK-LABEL: endless_loop:
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; CHECK-NEXT: # BB#0:
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; CHECK-NEXT: vmovaps (%eax), %ymm0
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0
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; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
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; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[0,1,0,1]
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; CHECK-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1
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; CHECK-NEXT: vxorps %ymm2, %ymm2, %ymm2
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; CHECK-NEXT: vblendps {{.*#+}} ymm1 = ymm2[0,1,2,3,4,5,6],ymm1[7]
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; CHECK-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm2[1,2,3,4,5,6,7]
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; CHECK-NEXT: vmovaps %ymm0, (%eax)
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; CHECK-NEXT: vmovaps %ymm1, (%eax)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retl
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entry:
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%0 = load <8 x i32>, <8 x i32> addrspace(1)* undef, align 32
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%1 = shufflevector <8 x i32> %0, <8 x i32> undef, <16 x i32> <i32 4, i32 4, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%2 = shufflevector <16 x i32> <i32 undef, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 undef>, <16 x i32> %1, <16 x i32> <i32 16, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 17>
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store <16 x i32> %2, <16 x i32> addrspace(1)* undef, align 64
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ret void
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}
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