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72ed88feac
the loop preheader. Add instructions which are already in the preheader block that may be common expressions of those that are hoisted out. These does get a few more instructions CSE'ed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85799 91177308-0d34-0410-b5e6-96231b3b80d8
120 lines
5.1 KiB
LLVM
120 lines
5.1 KiB
LLVM
; RUN: llc < %s -mtriple=arm-apple-darwin
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; RUN: llc < %s -mtriple=arm-apple-darwin -stats -info-output-file - | grep "Number of re-materialization" | grep 5
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%struct.CONTENTBOX = type { i32, i32, i32, i32, i32 }
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%struct.LOCBOX = type { i32, i32, i32, i32 }
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%struct.SIDEBOX = type { i32, i32 }
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%struct.UNCOMBOX = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
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%struct.cellbox = type { i8*, i32, i32, i32, [9 x i32], i32, i32, i32, i32, i32, i32, i32, double, double, double, double, double, i32, i32, %struct.CONTENTBOX*, %struct.UNCOMBOX*, [8 x %struct.tilebox*], %struct.SIDEBOX* }
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%struct.termbox = type { %struct.termbox*, i32, i32, i32, i32, i32 }
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%struct.tilebox = type { %struct.tilebox*, double, double, double, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.termbox*, %struct.LOCBOX* }
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@numcells = external global i32 ; <i32*> [#uses=1]
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@cellarray = external global %struct.cellbox** ; <%struct.cellbox***> [#uses=1]
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@numBinsY = external global i32 ; <i32*> [#uses=1]
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define fastcc void @fixpenal() {
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entry:
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%tmp491 = load i32* @numcells, align 4 ; <i32> [#uses=1]
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%tmp9 = load %struct.cellbox*** @cellarray, align 4 ; <%struct.cellbox**> [#uses=1]
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%tmp77.i = load i32* @numBinsY, align 4 ; <i32> [#uses=2]
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br label %bb490
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bb8: ; preds = %bb490, %cond_false428
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%foo3 = phi i1 [ 0, %bb490 ], [ 1, %cond_false428 ]
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br i1 %foo3, label %cond_false58.i, label %cond_false.i
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cond_false.i: ; preds = %bb8
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ret void
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cond_false58.i: ; preds = %bb8
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%highBinX.0.i = select i1 false, i32 1, i32 0 ; <i32> [#uses=2]
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br i1 %foo3, label %cond_next85.i, label %cond_false76.i
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cond_false76.i: ; preds = %cond_false58.i
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ret void
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cond_next85.i: ; preds = %cond_false58.i
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br i1 %foo3, label %cond_next105.i, label %cond_false98.i
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cond_false98.i: ; preds = %cond_next85.i
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ret void
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cond_next105.i: ; preds = %cond_next85.i
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%tmp108.i = icmp eq i32 1, %highBinX.0.i ; <i1> [#uses=1]
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%tmp115.i = icmp eq i32 1, %tmp77.i ; <i1> [#uses=1]
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%bothcond.i = and i1 %tmp115.i, %tmp108.i ; <i1> [#uses=1]
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%storemerge.i = select i1 %bothcond.i, i32 1, i32 0 ; <i32> [#uses=2]
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br i1 %bothcond.i, label %whoOverlaps.exit, label %bb503.preheader.i
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bb503.preheader.i: ; preds = %bb513.i, %cond_next105.i
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%i.022.0.i = phi i32 [ %tmp512.i, %bb513.i ], [ 0, %cond_next105.i ] ; <i32> [#uses=2]
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%tmp165.i = getelementptr i32*** null, i32 %i.022.0.i ; <i32***> [#uses=0]
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br label %bb503.i
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bb137.i: ; preds = %bb503.i
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br i1 %tmp506.i, label %bb162.i, label %bb148.i
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bb148.i: ; preds = %bb137.i
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ret void
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bb162.i: ; preds = %bb137.i
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%tmp49435.i = load i32* null ; <i32> [#uses=1]
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br label %bb170.i
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bb170.i: ; preds = %bb491.i, %bb162.i
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%indvar.i = phi i32 [ %k.032.0.i, %bb491.i ], [ 0, %bb162.i ] ; <i32> [#uses=2]
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%k.032.0.i = add i32 %indvar.i, 1 ; <i32> [#uses=2]
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%tmp173.i = getelementptr i32* null, i32 %k.032.0.i ; <i32*> [#uses=1]
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%tmp174.i = load i32* %tmp173.i ; <i32> [#uses=4]
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%tmp177.i = icmp eq i32 %tmp174.i, %cell.1 ; <i1> [#uses=1]
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%tmp184.i = icmp sgt i32 %tmp174.i, %tmp491 ; <i1> [#uses=1]
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%bothcond = or i1 %tmp177.i, %tmp184.i ; <i1> [#uses=1]
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br i1 %bothcond, label %bb491.i, label %cond_next188.i
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cond_next188.i: ; preds = %bb170.i
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%tmp191.i = getelementptr %struct.cellbox** %tmp9, i32 %tmp174.i ; <%struct.cellbox**> [#uses=1]
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%tmp192.i = load %struct.cellbox** %tmp191.i ; <%struct.cellbox*> [#uses=1]
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%tmp195.i = icmp eq i32 %tmp174.i, 0 ; <i1> [#uses=1]
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br i1 %tmp195.i, label %bb491.i, label %cond_true198.i
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cond_true198.i: ; preds = %cond_next188.i
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%tmp210.i = getelementptr %struct.cellbox* %tmp192.i, i32 0, i32 3 ; <i32*> [#uses=0]
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ret void
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bb491.i: ; preds = %cond_next188.i, %bb170.i
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%tmp490.i = add i32 %indvar.i, 2 ; <i32> [#uses=1]
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%tmp496.i = icmp slt i32 %tmp49435.i, %tmp490.i ; <i1> [#uses=1]
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br i1 %tmp496.i, label %bb500.i, label %bb170.i
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bb500.i: ; preds = %bb491.i
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%indvar.next82.i = add i32 %j.0.i, 1 ; <i32> [#uses=1]
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br label %bb503.i
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bb503.i: ; preds = %bb500.i, %bb503.preheader.i
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%j.0.i = phi i32 [ 0, %bb503.preheader.i ], [ %indvar.next82.i, %bb500.i ] ; <i32> [#uses=2]
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%tmp506.i = icmp sgt i32 %j.0.i, %tmp77.i ; <i1> [#uses=1]
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br i1 %tmp506.i, label %bb513.i, label %bb137.i
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bb513.i: ; preds = %bb503.i
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%tmp512.i = add i32 %i.022.0.i, 1 ; <i32> [#uses=2]
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%tmp516.i = icmp sgt i32 %tmp512.i, %highBinX.0.i ; <i1> [#uses=1]
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br i1 %tmp516.i, label %whoOverlaps.exit, label %bb503.preheader.i
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whoOverlaps.exit: ; preds = %bb513.i, %cond_next105.i
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%foo = phi i1 [ 1, %bb513.i], [0, %cond_next105.i]
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br i1 %foo, label %cond_false428, label %bb490
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cond_false428: ; preds = %whoOverlaps.exit
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br i1 %foo, label %bb497, label %bb8
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bb490: ; preds = %whoOverlaps.exit, %entry
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%binY.tmp.2 = phi i32 [ 0, %entry ], [ %storemerge.i, %whoOverlaps.exit ] ; <i32> [#uses=1]
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%cell.1 = phi i32 [ 1, %entry ], [ 0, %whoOverlaps.exit ] ; <i32> [#uses=1]
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%foo2 = phi i1 [ 1, %entry], [0, %whoOverlaps.exit]
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br i1 %foo2, label %bb497, label %bb8
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bb497: ; preds = %bb490, %cond_false428
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%binY.tmp.3 = phi i32 [ %binY.tmp.2, %bb490 ], [ %storemerge.i, %cond_false428 ] ; <i32> [#uses=0]
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ret void
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}
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