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c9f5f3f64f
This eliminates the need for several awkward casts, including the last dynamic_cast under lib/Target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51091 91177308-0d34-0410-b5e6-96231b3b80d8
96 lines
4.3 KiB
C++
96 lines
4.3 KiB
C++
//===- SPUInstrInfo.h - Cell SPU Instruction Information --------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the CellSPU implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef SPU_INSTRUCTIONINFO_H
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#define SPU_INSTRUCTIONINFO_H
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#include "SPU.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "SPURegisterInfo.h"
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namespace llvm {
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//! Cell SPU instruction information class
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class SPUInstrInfo : public TargetInstrInfoImpl {
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SPUTargetMachine &TM;
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const SPURegisterInfo RI;
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public:
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explicit SPUInstrInfo(SPUTargetMachine &tm);
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/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
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/// such, whenever a client has an instance of instruction info, it should
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/// always be able to get register info as well (through this method).
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///
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virtual const SPURegisterInfo &getRegisterInfo() const { return RI; }
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/// getPointerRegClass - Return the register class to use to hold pointers.
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/// This is used for addressing modes.
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virtual const TargetRegisterClass *getPointerRegClass() const;
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// Return true if the instruction is a register to register move and
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// leave the source and dest operands in the passed parameters.
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//
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virtual bool isMoveInstr(const MachineInstr& MI,
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unsigned& sourceReg,
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unsigned& destReg) const;
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unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
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unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
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virtual void copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *DestRC,
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const TargetRegisterClass *SrcRC) const;
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//! Store a register to a stack slot, based on its register class.
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virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned SrcReg, bool isKill, int FrameIndex,
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const TargetRegisterClass *RC) const;
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//! Store a register to an address, based on its register class
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virtual void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
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SmallVectorImpl<MachineOperand> &Addr,
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const TargetRegisterClass *RC,
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SmallVectorImpl<MachineInstr*> &NewMIs) const;
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//! Load a register from a stack slot, based on its register class.
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virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, int FrameIndex,
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const TargetRegisterClass *RC) const;
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//! Loqad a register from an address, based on its register class
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virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
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SmallVectorImpl<MachineOperand> &Addr,
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const TargetRegisterClass *RC,
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SmallVectorImpl<MachineInstr*> &NewMIs) const;
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//! Fold spills into load/store instructions
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virtual MachineInstr* foldMemoryOperand(MachineFunction &MF,
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MachineInstr* MI,
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SmallVectorImpl<unsigned> &Ops,
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int FrameIndex) const;
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//! Fold any load/store to an operand
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virtual MachineInstr* foldMemoryOperand(MachineFunction &MF,
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MachineInstr* MI,
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SmallVectorImpl<unsigned> &Ops,
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MachineInstr* LoadMI) const {
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return 0;
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}
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};
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}
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#endif
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