llvm/EarlyCSE at 741a7722138d02a0b0141a56f3e6a5f290f2ffaa - llvm

RPCS3/llvm

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History

Arnaud A. de Grandmaison c87636435d [EarlyCSE] Fix handling of target memory intrinsics for CSE'ing loads.

Summary:
Some target intrinsics can access multiple elements, using the pointer as a
base address (e.g. AArch64 ld4). When trying to CSE such instructions,
it must be checked the available value comes from a compatible instruction
because the pointer is not enough to discriminate whether the value is
correct.

Reviewers: ssijaric

Subscribers: mcrosier, llvm-commits, aemerson

Differential Revision: http://reviews.llvm.org/D13475

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249523 91177308-0d34-0410-b5e6-96231b3b80d8

2015-10-07 07:41:29 +00:00

AArch64

[EarlyCSE] Fix handling of target memory intrinsics for CSE'ing loads.

2015-10-07 07:41:29 +00:00

basic.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

commute.ll

Update Transforms tests to use CHECK-LABEL for easier debugging. No functionality change.

2013-07-14 01:42:54 +00:00

conditional.ll

Extend EarlyCSE to handle basic cases from JumpThreading and CVP