mirror of
https://github.com/RPCS3/llvm.git
synced 2025-01-27 05:32:22 +00:00
67032b27cd
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164434 91177308-0d34-0410-b5e6-96231b3b80d8
26 lines
781 B
TableGen
26 lines
781 B
TableGen
//===- MipsDSPInstrFormats.td - Mips Instruction Formats ---*- tablegen -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
def HasDSP : Predicate<"Subtarget.hasDSP()">,
|
|
AssemblerPredicate<"FeatureDSP">;
|
|
def HasDSPR2 : Predicate<"Subtarget.hasDSPR2()">,
|
|
AssemblerPredicate<"FeatureDSPR2">;
|
|
|
|
// Fields.
|
|
class Field6<bits<6> val> {
|
|
bits<6> V = val;
|
|
}
|
|
|
|
def SPECIAL3_OPCODE : Field6<0b011111>;
|
|
def REGIMM_OPCODE : Field6<0b000001>;
|
|
|
|
class DSPInst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther> {
|
|
let Predicates = [HasDSP];
|
|
}
|