llvm/test/MC/RISCV/fixups-diagnostics.s
Alex Bradbury 5f9771e742 [RISCV] Add common fixups and relocations
%lo(), %hi(), and %pcrel_hi() are supported and test cases have been added to 
ensure the appropriate fixups and relocations are generated. I've added an 
instruction format field which is used in RISCVMCCodeEmitter to, for 
instance, tell whether it should emit a lo12_i fixup or a lo12_s fixup 
(RISC-V has two 12-bit immediate encodings depending on the instruction 
type).

Differential Revision: https://reviews.llvm.org/D23568


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314389 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-28 08:26:24 +00:00

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ArmAsm

# RUN: not llvm-mc -triple riscv32 -filetype obj < %s -o /dev/null 2>&1 | FileCheck %s
jal a0, far_distant # CHECK: :[[@LINE]]:3: error: fixup value out of range
jal a0, unaligned # CHECK: :[[@LINE]]:3: error: fixup value must be 2-byte aligned
beq a0, a1, distant # CHECK: :[[@LINE]]:3: error: fixup value out of range
blt t0, t1, unaligned # CHECK: :[[@LINE]]:3: error: fixup value must be 2-byte aligned
.byte 0
unaligned:
.byte 0
.byte 0
.byte 0
.space 1<<12
distant:
.space 1<<20
far_distant: