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5f9771e742
%lo(), %hi(), and %pcrel_hi() are supported and test cases have been added to ensure the appropriate fixups and relocations are generated. I've added an instruction format field which is used in RISCVMCCodeEmitter to, for instance, tell whether it should emit a lo12_i fixup or a lo12_s fixup (RISC-V has two 12-bit immediate encodings depending on the instruction type). Differential Revision: https://reviews.llvm.org/D23568 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314389 91177308-0d34-0410-b5e6-96231b3b80d8
66 lines
2.0 KiB
ArmAsm
66 lines
2.0 KiB
ArmAsm
# RUN: llvm-mc -triple riscv32 < %s -show-encoding \
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# RUN: | FileCheck -check-prefix=INSTR -check-prefix=FIXUP %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
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# RUN: | llvm-readobj -r | FileCheck -check-prefix=RELOC %s
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# Check prefixes:
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# RELOC - Check the relocation in the object.
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# FIXUP - Check the fixup on the instruction.
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# INSTR - Check the instruction is handled properly by the ASMPrinter
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.long foo
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# RELOC: R_RISCV_32 foo
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.quad foo
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# RELOC: R_RISCV_64 foo
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lui t1, %hi(foo)
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# RELOC: R_RISCV_HI20 foo 0x0
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# INSTR: lui t1, %hi(foo)
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# FIXUP: fixup A - offset: 0, value: %hi(foo), kind: fixup_riscv_hi20
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lui t1, %hi(foo+4)
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# RELOC: R_RISCV_HI20 foo 0x4
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# INSTR: lui t1, %hi(foo+4)
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# FIXUP: fixup A - offset: 0, value: %hi(foo+4), kind: fixup_riscv_hi20
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addi t1, t1, %lo(foo)
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# RELOC: R_RISCV_LO12_I foo 0x0
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# INSTR: addi t1, t1, %lo(foo)
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# FIXUP: fixup A - offset: 0, value: %lo(foo), kind: fixup_riscv_lo12_i
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addi t1, t1, %lo(foo+4)
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# RELOC: R_RISCV_LO12_I foo 0x4
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# INSTR: addi t1, t1, %lo(foo+4)
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# FIXUP: fixup A - offset: 0, value: %lo(foo+4), kind: fixup_riscv_lo12_i
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sb t1, %lo(foo)(a2)
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# RELOC: R_RISCV_LO12_S foo 0x0
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# INSTR: sb t1, %lo(foo)(a2)
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# FIXUP: fixup A - offset: 0, value: %lo(foo), kind: fixup_riscv_lo12_s
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sb t1, %lo(foo+4)(a2)
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# RELOC: R_RISCV_LO12_S foo 0x4
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# INSTR: sb t1, %lo(foo+4)(a2)
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# FIXUP: fixup A - offset: 0, value: %lo(foo+4), kind: fixup_riscv_lo12_s
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auipc t1, %pcrel_hi(foo)
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# RELOC: R_RISCV_PCREL_HI20 foo 0x0
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# INSTR: auipc t1, %pcrel_hi(foo)
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# FIXUP: fixup A - offset: 0, value: %pcrel_hi(foo), kind: fixup_riscv_pcrel_hi20
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auipc t1, %pcrel_hi(foo+4)
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# RELOC: R_RISCV_PCREL_HI20 foo 0x4
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# INSTR: auipc t1, %pcrel_hi(foo+4)
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# FIXUP: fixup A - offset: 0, value: %pcrel_hi(foo+4), kind: fixup_riscv_pcrel_hi20
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jal zero, foo
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# RELOC: R_RISCV_JAL
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# INSTR: jal zero, foo
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# FIXUP: fixup A - offset: 0, value: foo, kind: fixup_riscv_jal
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bgeu a0, a1, foo
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# RELOC: R_RISCV_BRANCH
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# INSTR: bgeu a0, a1, foo
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# FIXUP: fixup A - offset: 0, value: foo, kind: fixup_riscv_branch
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