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922d314e8f
Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT. Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches. Adds a test to verify that the scheduler is working. Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP. Patch by Preston Gurd! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149558 91177308-0d34-0410-b5e6-96231b3b80d8
26 lines
561 B
LLVM
26 lines
561 B
LLVM
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
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; First without noredzone.
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; CHECK: f0:
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; CHECK: -4(%rsp)
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; CHECK: -4(%rsp)
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; CHECK: ret
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define x86_fp80 @f0(float %f) nounwind readnone {
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entry:
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%0 = fpext float %f to x86_fp80 ; <x86_fp80> [#uses=1]
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ret x86_fp80 %0
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}
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; Then with noredzone.
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; CHECK: f1:
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; CHECK: subq $4, %rsp
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; CHECK: (%rsp)
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; CHECK: (%rsp)
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; CHECK: addq $4, %rsp
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; CHECK: ret
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define x86_fp80 @f1(float %f) nounwind readnone noredzone {
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entry:
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%0 = fpext float %f to x86_fp80 ; <x86_fp80> [#uses=1]
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ret x86_fp80 %0
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}
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