Tim Northover d805bf8d61 AArch64/ARM64: use HS instead of CS & LO instead of CC. ... On instructions using the NZCV register, a couple of conditions have dual representations: HS/CS and LO/CC (meaning unsigned-higher-or-same/carry-set and unsigned-lower/carry-clear). The first of these is more descriptive in most circumstances, so we should print it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207644 91177308-0d34-0410-b5e6-96231b3b80d8		2014-04-30 13:14:03 +00:00
..
AArch64	AArch64/ARM64: use HS instead of CS & LO instead of CC.	2014-04-30 13:14:03 +00:00
ARM	ARM: support stack probe emission for Windows on ARM	2014-04-30 07:05:07 +00:00
ARM64	AArch64/ARM64: use HS instead of CS & LO instead of CC.	2014-04-30 13:14:03 +00:00
CPP
Generic	MC: move test from Generic to COFF	2014-04-23 21:41:07 +00:00
Hexagon
Inputs
Mips	[mips][msa] Fix vector insertions where the index is variable	2014-04-30 12:09:32 +00:00
MSP430
NVPTX	Fix the test: DCE optimized away everything.	2014-04-21 17:23:12 +00:00
PowerPC	[PowerPC] Fix rlwimi isel when mask is not constant	2014-04-13 17:10:58 +00:00
R600	R600/SI: Custom lower SI_IF and SI_ELSE to avoid machine verifier errors	2014-04-29 23:12:53 +00:00
SPARC	Revert "blockfreq: Temporarily turn on -debug-only=block-freq"	2014-04-19 22:45:44 +00:00
SystemZ	Reenable use of TBAA during CodeGen	2014-04-12 01:26:00 +00:00
Thumb	Make this test not match its own filename, when being run from a path that includes the string 'add'.	2014-04-15 22:29:32 +00:00
Thumb2
X86	Implement X86 code generation for musttail	2014-04-29 23:55:41 +00:00
XCore	Reapply "blockfreq: Rewrite BlockFrequencyInfoImpl"	2014-04-21 17:57:07 +00:00