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llvm/test/CodeGen/MSP430
Anton Korobeynikov ceb39000f3 [MSP430] Optimize srl/sra in case of A >> (8 + N)
There is no variable-length shifts on MSP430. Therefore
"eat" 8 bits of shift via bswap & ext.

Path by Kristina Bessonova!

Differential Revision: https://reviews.llvm.org/D54623



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@347187 91177308-0d34-0410-b5e6-96231b3b80d8
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