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349c2787cf
PowerPC target. This is the last of the four models, so we now have full TLS support. This is mostly a straightforward extension of the general dynamic model. I had to use an additional Chain operand to tie ADDIS_DTPREL_HA to the register copy following ADDI_TLSLD_L; otherwise everything above the ADDIS_DTPREL_HA appeared dead and was removed. As before, there are new test cases to test the assembly generation, and the relocations output during integrated assembly. The expected code gen sequence can be read in test/CodeGen/PowerPC/tls-ld.ll. There are a couple of things I think can be done more efficiently in the overall TLS code, so there will likely be a clean-up patch forthcoming; but for now I want to be sure the functionality is in place. Bill git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170003 91177308-0d34-0410-b5e6-96231b3b80d8
25 lines
807 B
LLVM
25 lines
807 B
LLVM
; RUN: llc -mcpu=pwr7 -O0 -relocation-model=pic < %s | FileCheck %s
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; Test correct assembly code generation for thread-local storage using
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; the local dynamic model.
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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@a = hidden thread_local global i32 0, align 4
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define signext i32 @main() nounwind {
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entry:
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%retval = alloca i32, align 4
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store i32 0, i32* %retval
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%0 = load i32* @a, align 4
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ret i32 %0
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}
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; CHECK: addis [[REG:[0-9]+]], 2, a@got@tlsld@ha
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; CHECK-NEXT: addi 3, [[REG]], a@got@tlsld@l
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; CHECK-NEXT: bl __tls_get_addr(a@tlsld)
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; CHECK-NEXT: nop
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; CHECK-NEXT: addis [[REG2:[0-9]+]], 3, a@dtprel@ha
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; CHECK-NEXT: addi {{[0-9]+}}, [[REG2]], a@dtprel@l
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