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llvm/lib/Target/Mips
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Vladimir Medic 798cdc6af1 Remove obsolete code from MipsAsmParser.cpp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190396 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 09:39:55 +00:00
..
AsmParser
Remove obsolete code from MipsAsmParser.cpp.
2013-09-10 09:39:55 +00:00
Disassembler
This patch adds support for microMIPS disassembler and disassembler make check tests.
2013-09-06 12:30:36 +00:00
InstPrinter
[mips] Place parentheses around && to silence warning.
2013-09-07 00:26:26 +00:00
MCTargetDesc
Generate compact unwind encoding from CFI directives.
2013-09-09 02:37:14 +00:00
TargetInfo
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CMakeLists.txt
Turn MipsOptimizeMathLibCalls into a target-independent scalar transform
2013-08-23 10:27:02 +00:00
LLVMBuild.txt
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Makefile
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MicroMipsInstrFormats.td
This patch adds support for microMIPS Move to/from HI/LO instructions. Test cases are included in patch.
2013-09-06 12:53:21 +00:00
MicroMipsInstrInfo.td
[mips] Use uimm5 and uimm6 instead of shamt and imm, if the immediate has to fit
2013-09-07 00:02:02 +00:00
Mips16FrameLowering.cpp
Add the saving of S2. This is needed for some of the floating point
2013-08-04 23:56:53 +00:00
Mips16FrameLowering.h
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Mips16HardFloat.cpp
Make sure we don't generate stubs for any of these functions because they
2013-09-01 04:12:59 +00:00
Mips16HardFloat.h
Checkin in of first of several patches to finish implementation of
2013-05-10 22:25:39 +00:00
Mips16InstrFormats.td
Create a pattern for the "trap" instruction.
2013-08-07 04:00:26 +00:00
Mips16InstrInfo.cpp
Remove unused stdio.h includes
2013-08-18 08:29:51 +00:00
Mips16InstrInfo.h
Clean up code for Mips16 large frame handling.
2013-08-04 01:13:25 +00:00
Mips16InstrInfo.td
[mips] Use uimm5 and uimm6 instead of shamt and imm, if the immediate has to fit
2013-09-07 00:02:02 +00:00
Mips16ISelDAGToDAG.cpp
Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
2013-06-19 21:36:55 +00:00
Mips16ISelDAGToDAG.h
Track IR ordering of SelectionDAG nodes 2/4.
2013-05-25 02:42:55 +00:00
Mips16ISelLowering.cpp
Add another intrinsic that LLVM gives an incorrect prototype to.
2013-08-09 21:33:41 +00:00
Mips16ISelLowering.h
Mips: Remove global set.
2013-06-13 19:06:52 +00:00
Mips16RegisterInfo.cpp
Clean up code for Mips16 large frame handling.
2013-08-04 01:13:25 +00:00
Mips16RegisterInfo.h
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 07:04:14 +00:00
Mips64InstrInfo.td
[mips] Add definition of instruction "drotr32" (double rotate right plus 32).
2013-09-07 00:18:01 +00:00
Mips.h
Turn MipsOptimizeMathLibCalls into a target-independent scalar transform
2013-08-23 10:27:02 +00:00
Mips.td
[Mips][msa] Added initial MSA support.
2013-08-13 20:54:07 +00:00
MipsAnalyzeImmediate.cpp
Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.
2013-05-24 22:23:49 +00:00
MipsAnalyzeImmediate.h
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MipsAsmPrinter.cpp
[mips] Rename register classes CPURegs and CPU64Regs.
2013-08-06 23:08:38 +00:00
MipsAsmPrinter.h
DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
2013-06-16 20:34:27 +00:00
MipsCallingConv.td
[mips] Add support for calling convention CC_MipsO32_FP64, which is used when the
2013-08-20 23:38:40 +00:00
MipsCodeEmitter.cpp
[mips] Define "trap" as a pseudo instruction that turns into "break 0, 0".
2013-09-06 23:52:46 +00:00
MipsCondMov.td
[mips] Set instruction itineraries of loads, stores and conditional moves.
2013-09-06 23:28:24 +00:00
MipsConstantIslandPass.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 07:04:14 +00:00
MipsDelaySlotFiller.cpp
Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size.
2013-07-03 15:07:05 +00:00
MipsDSPInstrFormats.td
[mips] DSP-ASE move from HI/LO register instructions.
2013-04-18 00:52:44 +00:00
MipsDSPInstrInfo.td
[mips] Use uimm5 and uimm6 instead of shamt and imm, if the immediate has to fit
2013-09-07 00:02:02 +00:00
MipsFrameLowering.cpp
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MipsFrameLowering.h
…
MipsInstrFormats.td
[mips] Make "b" (unconditional branch) a pseudo. "b" is an assembly idiom, which is
2013-09-06 23:40:15 +00:00
MipsInstrFPU.td
[mips] Enhance command line option "-mno-ldc1-sdc1" to expand base+index double
2013-09-07 00:52:30 +00:00
MipsInstrInfo.cpp
DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
2013-06-16 20:34:27 +00:00
MipsInstrInfo.h
DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
2013-06-16 20:34:27 +00:00
MipsInstrInfo.td
[mips] Use uimm5 and uimm6 instead of shamt and imm, if the immediate has to fit
2013-09-07 00:02:02 +00:00
MipsISelDAGToDAG.cpp
[mips][msa] Added load/store intrinsics.
2013-08-28 12:04:29 +00:00
MipsISelDAGToDAG.h
[mips][msa] Added load/store intrinsics.
2013-08-28 12:04:29 +00:00
MipsISelLowering.cpp
Fix a problem with dual mips16/mips32 mode. When the underlying processor
2013-08-30 19:40:56 +00:00
MipsISelLowering.h
[mips] Enhance command line option "-mno-ldc1-sdc1" to expand base+index double
2013-09-07 00:52:30 +00:00
MipsJITInfo.cpp
[test commit] Minor comment change.
2013-07-24 13:02:35 +00:00
MipsJITInfo.h
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MipsLongBranch.cpp
Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size.
2013-07-04 01:31:24 +00:00
MipsMachineFunction.cpp
[mips] Rename register classes CPURegs and CPU64Regs.
2013-08-06 23:08:38 +00:00
MipsMachineFunction.h
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MipsMCInstLower.cpp
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MipsMCInstLower.h
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MipsModuleISelDAGToDAG.cpp
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MipsModuleISelDAGToDAG.h
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MipsMSAInstrFormats.td
[mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v
2013-08-28 12:14:50 +00:00
MipsMSAInstrInfo.td
[mips] Use uimm5 and uimm6 instead of shamt and imm, if the immediate has to fit
2013-09-07 00:02:02 +00:00
MipsOs16.cpp
Add an option which permits the user to specify using a bitmask, that various
2013-08-20 20:53:09 +00:00
MipsOs16.h
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MipsRegisterInfo.cpp
[mips][msa] Added cfcmsa, and ctcmsa
2013-08-28 10:26:24 +00:00
MipsRegisterInfo.h
[mips] Resolve register classes dynamically using ptr_rc to reduce the number of
2013-08-20 21:08:22 +00:00
MipsRegisterInfo.td
[mips][msa] Added cfcmsa, and ctcmsa
2013-08-28 10:26:24 +00:00
MipsRelocations.h
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MipsSchedule.td
[mips] Define instruction itineraries IIArith and IILogic.
2013-07-31 00:55:34 +00:00
MipsSEFrameLowering.cpp
[mips] Define register class FGRH32 for the high half of the 64-bit floating
2013-08-20 22:58:56 +00:00
MipsSEFrameLowering.h
…
MipsSEInstrInfo.cpp
[mips] Enhance command line option "-mno-ldc1-sdc1" to expand base+index double
2013-09-07 00:52:30 +00:00
MipsSEInstrInfo.h
[mips] Enhance command line option "-mno-ldc1-sdc1" to expand base+index double
2013-09-07 00:52:30 +00:00
MipsSEISelDAGToDAG.cpp
[mips][msa] Added load/store intrinsics.
2013-08-28 12:04:29 +00:00
MipsSEISelDAGToDAG.h
[mips][msa] Added load/store intrinsics.
2013-08-28 12:04:29 +00:00
MipsSEISelLowering.cpp
[mips] When double precision loads and stores are split into two i32 loads and
2013-09-09 17:59:32 +00:00
MipsSEISelLowering.h
[mips] Enhance command line option "-mno-ldc1-sdc1" to expand base+index double
2013-09-07 00:52:30 +00:00
MipsSelectionDAGInfo.cpp
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MipsSelectionDAGInfo.h
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MipsSERegisterInfo.cpp
[mips] Rename register classes CPURegs and CPU64Regs.
2013-08-06 23:08:38 +00:00
MipsSERegisterInfo.h
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 07:04:14 +00:00
MipsSubtarget.cpp
Fix a problem with dual mips16/mips32 mode. When the underlying processor
2013-08-30 19:40:56 +00:00
MipsSubtarget.h
Fix a problem with dual mips16/mips32 mode. When the underlying processor
2013-08-30 19:40:56 +00:00
MipsTargetMachine.cpp
Turn MipsOptimizeMathLibCalls into a target-independent scalar transform
2013-08-23 10:27:02 +00:00
MipsTargetMachine.h
[mips] Implement MipsTargetMachine::getInstrItineraryData().
2013-07-12 23:33:22 +00:00
MipsTargetObjectFile.cpp
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MipsTargetObjectFile.h
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