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tMOVr and tPUSH/tPOP/tPOP_RET have register constraints which can't be expressed in TableGen, so check them explicitly. I've unfortunately run into issues with both of these recently; hopefully this saves some time for someone else in the future. Differential Revision: https://reviews.llvm.org/D59383 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356303 91177308-0d34-0410-b5e6-96231b3b80d8
23 lines
577 B
YAML
23 lines
577 B
YAML
# RUN: not llc -mtriple=thumb -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# This test ensures that the MIR parser runs the machine verifier after parsing.
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--- |
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define i32 @inc(i32 %a) {
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entry:
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ret i32 %a
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}
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...
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---
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name: inc
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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; CHECK: *** Bad machine code: Unsupported register in Thumb1 push/pop ***
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frame-setup tPUSH 14, $noreg, undef $r12, killed $lr, implicit-def $sp, implicit $sp
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; CHECK: *** Bad machine code: Non-flag-setting Thumb1 mov is v6-only ***
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$r2 = tMOVr killed $r6, 14, $noreg
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...
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