mirror of
https://github.com/RPCS3/llvm.git
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7b837d8c75
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
92 lines
2.3 KiB
LLVM
92 lines
2.3 KiB
LLVM
; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s
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define void @call0() nounwind {
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entry:
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ret void
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}
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define void @foo0() nounwind {
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entry:
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; CHECK: foo0
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; CHECK: bl _call0
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call void @call0()
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ret void
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}
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define i32 @call1(i32 %a) nounwind {
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entry:
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%a.addr = alloca i32, align 4
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store i32 %a, i32* %a.addr, align 4
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%tmp = load i32* %a.addr, align 4
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ret i32 %tmp
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}
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define i32 @foo1(i32 %a) nounwind {
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entry:
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; CHECK: foo1
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; CHECK: stur w0, [fp, #-4]
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; CHECK-NEXT: ldur w0, [fp, #-4]
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; CHECK-NEXT: bl _call1
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%a.addr = alloca i32, align 4
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store i32 %a, i32* %a.addr, align 4
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%tmp = load i32* %a.addr, align 4
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%call = call i32 @call1(i32 %tmp)
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ret i32 %call
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}
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define i32 @sext_(i8 %a, i16 %b) nounwind {
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entry:
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; CHECK: @sext_
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; CHECK: sxtb w0, w0
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; CHECK: sxth w1, w1
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; CHECK: bl _foo_sext_
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call void @foo_sext_(i8 signext %a, i16 signext %b)
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ret i32 0
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}
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declare void @foo_sext_(i8 %a, i16 %b)
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define i32 @zext_(i8 %a, i16 %b) nounwind {
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entry:
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; CHECK: @zext_
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; CHECK: uxtb w0, w0
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; CHECK: uxth w1, w1
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call void @foo_zext_(i8 zeroext %a, i16 zeroext %b)
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ret i32 0
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}
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declare void @foo_zext_(i8 %a, i16 %b)
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define i32 @t1(i32 %argc, i8** nocapture %argv) {
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entry:
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; CHECK: @t1
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; The last parameter will be passed on stack via i8.
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; CHECK: strb w{{[0-9]+}}, [sp]
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; CHECK-NEXT: bl _bar
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%call = call i32 @bar(i8 zeroext 0, i8 zeroext -8, i8 zeroext -69, i8 zeroext 28, i8 zeroext 40, i8 zeroext -70, i8 zeroext 28, i8 zeroext 39, i8 zeroext -41)
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ret i32 0
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}
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declare i32 @bar(i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext)
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; Test materialization of integers. Target-independent selector handles this.
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define i32 @t2() {
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entry:
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; CHECK: @t2
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; CHECK: movz x0, #0
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; CHECK: orr w1, wzr, #0xfffffff8
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; CHECK: orr w[[REG:[0-9]+]], wzr, #0x3ff
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; CHECK: orr w[[REG2:[0-9]+]], wzr, #0x2
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; CHECK: movz w[[REG3:[0-9]+]], #0
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; CHECK: orr w[[REG4:[0-9]+]], wzr, #0x1
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; CHECK: uxth w2, w[[REG]]
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; CHECK: sxtb w3, w[[REG2]]
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; CHECK: and w4, w[[REG3]], #0x1
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; CHECK: and w5, w[[REG4]], #0x1
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; CHECK: bl _func2
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%call = call i32 @func2(i64 zeroext 0, i32 signext -8, i16 zeroext 1023, i8 signext -254, i1 zeroext 0, i1 zeroext 1)
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ret i32 0
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}
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declare i32 @func2(i64 zeroext, i32 signext, i16 zeroext, i8 signext, i1 zeroext, i1 zeroext)
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