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7b837d8c75
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
16 lines
639 B
LLVM
16 lines
639 B
LLVM
; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple | FileCheck %s
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; DAGCombine to transform a conversion of an extract_vector_elt to an
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; extract_vector_elt of a conversion, which saves a round trip of copies
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; of the value to a GPR and back to and FPR.
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; rdar://11855286
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define double @foo0(<2 x i64> %a) nounwind {
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; CHECK: scvtf.2d [[REG:v[0-9]+]], v0, #9
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; CHECK-NEXT: ins.d v0[0], [[REG]][1]
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%vecext = extractelement <2 x i64> %a, i32 1
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%fcvt_n = tail call double @llvm.arm64.neon.vcvtfxs2fp.f64.i64(i64 %vecext, i32 9)
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ret double %fcvt_n
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}
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declare double @llvm.arm64.neon.vcvtfxs2fp.f64.i64(i64, i32) nounwind readnone
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