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7b837d8c75
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
39 lines
1.1 KiB
LLVM
39 lines
1.1 KiB
LLVM
; RUN: llc < %s -mtriple=arm64-apple-ios7.0 | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-linux-gnu | FileCheck %s --check-prefix=CHECK-LINUX
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; CHECK-LABEL: main:
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; CHECK: stp fp, lr, [sp, #-16]!
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; CHECK-NEXT: mov fp, sp
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; CHECK-NEXT: sub sp, sp, #16
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; CHECK-NEXT: stur wzr, [fp, #-4]
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; CHECK: adrp x0, L_.str@PAGE
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; CHECK: add x0, x0, L_.str@PAGEOFF
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; CHECK-NEXT: bl _puts
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; CHECK-NEXT: mov sp, fp
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; CHECK-NEXT: ldp fp, lr, [sp], #16
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; CHECK-NEXT: ret
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; CHECK-LINUX-LABEL: main:
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; CHECK-LINUX: stp fp, lr, [sp, #-16]!
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; CHECK-LINUX-NEXT: mov fp, sp
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; CHECK-LINUX-NEXT: sub sp, sp, #16
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; CHECK-LINUX-NEXT: stur wzr, [fp, #-4]
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; CHECK-LINUX: adrp x0, .L.str
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; CHECK-LINUX: add x0, x0, :lo12:.L.str
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; CHECK-LINUX-NEXT: bl puts
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; CHECK-LINUX-NEXT: mov sp, fp
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; CHECK-LINUX-NEXT: ldp fp, lr, [sp], #16
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; CHECK-LINUX-NEXT: ret
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@.str = private unnamed_addr constant [7 x i8] c"hello\0A\00"
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define i32 @main() nounwind ssp {
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entry:
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%retval = alloca i32, align 4
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store i32 0, i32* %retval
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%call = call i32 @puts(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0))
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ret i32 %call
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}
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declare i32 @puts(i8*)
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