llvm/test/CodeGen/ARM64/ldur.ll
Tim Northover 7b837d8c75 ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 10:18:08 +00:00

68 lines
1.5 KiB
LLVM

; RUN: llc < %s -march=arm64 | FileCheck %s
define i64 @_f0(i64* %p) {
; CHECK: f0:
; CHECK: ldur x0, [x0, #-8]
; CHECK-NEXT: ret
%tmp = getelementptr inbounds i64* %p, i64 -1
%ret = load i64* %tmp, align 2
ret i64 %ret
}
define i32 @_f1(i32* %p) {
; CHECK: f1:
; CHECK: ldur w0, [x0, #-4]
; CHECK-NEXT: ret
%tmp = getelementptr inbounds i32* %p, i64 -1
%ret = load i32* %tmp, align 2
ret i32 %ret
}
define i16 @_f2(i16* %p) {
; CHECK: f2:
; CHECK: ldurh w0, [x0, #-2]
; CHECK-NEXT: ret
%tmp = getelementptr inbounds i16* %p, i64 -1
%ret = load i16* %tmp, align 2
ret i16 %ret
}
define i8 @_f3(i8* %p) {
; CHECK: f3:
; CHECK: ldurb w0, [x0, #-1]
; CHECK-NEXT: ret
%tmp = getelementptr inbounds i8* %p, i64 -1
%ret = load i8* %tmp, align 2
ret i8 %ret
}
define i64 @zext32(i8* %a) nounwind ssp {
; CHECK-LABEL: zext32:
; CHECK: ldur w0, [x0, #-12]
; CHECK-NEXT: ret
%p = getelementptr inbounds i8* %a, i64 -12
%tmp1 = bitcast i8* %p to i32*
%tmp2 = load i32* %tmp1, align 4
%ret = zext i32 %tmp2 to i64
ret i64 %ret
}
define i64 @zext16(i8* %a) nounwind ssp {
; CHECK-LABEL: zext16:
; CHECK: ldurh w0, [x0, #-12]
; CHECK-NEXT: ret
%p = getelementptr inbounds i8* %a, i64 -12
%tmp1 = bitcast i8* %p to i16*
%tmp2 = load i16* %tmp1, align 2
%ret = zext i16 %tmp2 to i64
ret i64 %ret
}
define i64 @zext8(i8* %a) nounwind ssp {
; CHECK-LABEL: zext8:
; CHECK: ldurb w0, [x0, #-12]
; CHECK-NEXT: ret
%p = getelementptr inbounds i8* %a, i64 -12
%tmp2 = load i8* %p, align 1
%ret = zext i8 %tmp2 to i64
ret i64 %ret
}