Amara Emerson 7c631c8afc [AArch64] Enable use of reduction intrinsics. ...

The new experimental reduction intrinsics can now be used, so I'm enabling this
for AArch64. We will need this for SVE anyway, so it makes sense to do this for
NEON reductions as well.

The existing code to match shufflevector patterns are replaced with a direct
lowering of the reductions to AArch64-specific nodes. Tests updated with the
new, simpler, representation.

Differential Revision: https://reviews.llvm.org/D32247


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302678 91177308-0d34-0410-b5e6-96231b3b80d8

2017-05-10 15:15:38 +00:00

..

aarch64-predication.ll

[LV] Make test case more robust

2017-04-05 14:34:13 +00:00

aarch64-unroll.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arbitrary-induction-step.ll

[LV] Unify vector and scalar maps

2016-08-24 18:23:17 +00:00

arm64-unroll.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

backedge-overflow.ll

Re-commit [SCEV] Introduce a guarded backedge taken count and use it in LAA and LV

2016-04-08 14:29:09 +00:00

deterministic-type-shrinkage.ll

[LoopVectorize] Use MapVector rather than DenseMap for MinBWs.

2015-11-26 20:39:51 +00:00

gather-cost.ll

Second attempt at r285517.

2016-10-31 13:17:31 +00:00

induction-trunc.ll

Reapply "[LV] Extend trunc optimization to all IVs with constant integer steps"

2017-02-14 16:28:32 +00:00

interleaved_cost.ll

[TargetTransformInfo] getIntrinsicInstrCost() scalarization estimation improved

2017-03-14 06:35:36 +00:00

interleaved-vs-scalar.ll

[Loop Vectorizer] Cost-based decision for vectorization form of memory instruction.

2017-02-08 19:25:23 +00:00

lit.local.cfg

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

loop-vectorization-factors.ll

[LV] Fix the vector code generation for first order recurrence

2017-04-13 18:59:25 +00:00

max-vf-for-interleaved.ll

[LAA] Rename forwarding conflict detection option (NFC)

2016-05-16 17:00:56 +00:00

pr31900.ll

[LoopVectorize] Added address space check when analysing interleaved accesses

2017-02-22 18:37:36 +00:00

predication_costs.ll

Reapply "[LV] Enable vectorization of loops with conditional stores by default"

2016-12-16 19:12:02 +00:00

reduction-small-size.ll

[AArch64] Enable use of reduction intrinsics.

2017-05-10 15:15:38 +00:00

sdiv-pow2.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

smallest-and-widest-types.ll

[LV] Considier non-consecutive but vectorizable accesses for VF selection

2017-03-02 13:55:05 +00:00

type-shrinkage-insertelt.ll

[LV] Add support for insertelt/extractelt processing during type truncation

2016-02-15 15:38:17 +00:00