Elena Demikhovsky c75a44cda7 AVX512: combining setcc and zext is wrong on AVX512 ...

because vector compare instruction puts result in mask register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199798 91177308-0d34-0410-b5e6-96231b3b80d8

2014-01-22 12:26:19 +00:00

..

CMakeLists.txt

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DAGCombiner.cpp

AVX512: combining setcc and zext is wrong on AVX512

2014-01-22 12:26:19 +00:00

FastISel.cpp

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FunctionLoweringInfo.cpp

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InstrEmitter.cpp

Always let value types influence register classes.

2014-01-14 06:18:38 +00:00

InstrEmitter.h

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LegalizeDAG.cpp

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LegalizeFloatTypes.cpp

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LegalizeIntegerTypes.cpp

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LegalizeTypes.cpp

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LegalizeTypes.h

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LegalizeTypesGeneric.cpp

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LegalizeVectorOps.cpp

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LegalizeVectorTypes.cpp

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LLVMBuild.txt

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Makefile

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ResourcePriorityQueue.cpp

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ScheduleDAGFast.cpp

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ScheduleDAGRRList.cpp

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ScheduleDAGSDNodes.cpp

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ScheduleDAGSDNodes.h

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ScheduleDAGVLIW.cpp

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SDNodeDbgValue.h

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SelectionDAG.cpp

[DAG] Teach DAG to also reassociate vector operations

2014-01-13 20:51:35 +00:00

SelectionDAGBuilder.cpp

Fix non-deterministic SDNodeOrder-dependent codegen

2014-01-12 14:09:17 +00:00

SelectionDAGBuilder.h

Fix non-deterministic SDNodeOrder-dependent codegen

2014-01-12 14:09:17 +00:00

SelectionDAGDumper.cpp

Put the functionality for printing a value to a raw_ostream as an

2014-01-09 02:29:41 +00:00

SelectionDAGISel.cpp

Hide the pre-RA-sched= option.

2014-01-13 20:08:27 +00:00

SelectionDAGPrinter.cpp

Put the functionality for printing a value to a raw_ostream as an

2014-01-09 02:29:41 +00:00

TargetLowering.cpp

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TargetSelectionDAGInfo.cpp

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