Jeremy Morse 9df035808c [DebugInfo] LiveDebugValues: correctly discriminate kinds of variable locations ...

The missing line added by this patch ensures that only spilt variable
locations are candidates for being restored from the stack. Otherwise,
register or constant-value information can be interpreted as a spill
location, through a union.

The added regression test replicates a scenario where this occurs: the
stack load from [rsp] causes the register-location DBG_VALUE to be
"restored" to rsi, when it should be left alone. See PR43058 for details.

Un x-fail a test that was suffering from this from a previous patch.

Differential Revision: https://reviews.llvm.org/D66895


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@370334 91177308-0d34-0410-b5e6-96231b3b80d8

2019-08-29 11:20:54 +00:00

..

AArch64

Add requirement to test.

2019-08-29 00:46:57 +00:00

AMDGPU

AMDGPU: Don't use frame virtual registers

2019-08-29 01:13:47 +00:00

ARC

[lit] Delete empty lines at the end of lit.local.cfg NFC

2019-06-17 09:51:07 +00:00

ARM

[DebugInfo] LiveDebugValues: correctly discriminate kinds of variable locations

2019-08-29 11:20:54 +00:00

AVR

[AVR] Fix tests after r363757

2019-07-04 06:12:47 +00:00

BPF

[BPF] Fix bpf llvm-objdump issues.

2019-08-17 22:12:00 +00:00

Generic

[GlobalISel] Handle multiple registers in dbg.value intrinsic

2019-08-20 16:28:37 +00:00

Hexagon

[Hexagon] Improve generated code for test-if-bit-clear

2019-08-26 19:08:08 +00:00

Inputs

[CodeGen] Add stack protector tests where the guard gets re-assigned

2019-07-17 20:46:16 +00:00

Lanai

[SDAG] commute setcc operands to match a subtract

2019-07-10 23:23:54 +00:00

Mips

GlobalISel/TableGen: Handle setcc patterns

2019-08-29 01:13:41 +00:00

MIR

AMDGPU: Add amdgpu-32bit-address-high-bits to MIR serialization

2019-08-27 18:18:38 +00:00

MSP430

[lit] Delete empty lines at the end of lit.local.cfg NFC

2019-06-17 09:51:07 +00:00

NVPTX

[NVPTX] Fix PR41651

2019-07-30 19:52:01 +00:00

PowerPC

[FPEnv] Add fptosi and fptoui constrained intrinsics.

2019-08-28 16:33:36 +00:00

RISCV

[RISCV] Avoid generating AssertZext for LP64 ABI when lowering floating LibCall

2019-08-28 23:40:37 +00:00

SPARC

[test] Fix tests when run on windows after SVN r369426. NFC.

2019-08-20 20:58:02 +00:00

SystemZ

[SystemZ] Regenerate <8 x i31> store test

2019-07-29 09:49:23 +00:00

Thumb

[MBP] Disable aggressive loop rotate in plain mode

2019-08-22 16:21:32 +00:00

Thumb2

[ARM] MVE Masked loads and stores

2019-08-29 10:54:35 +00:00

WebAssembly

[WebAssembly] Add atomic.fence instruction

2019-08-28 23:13:43 +00:00

WinCFGuard

[COFF] Emit @feat.00 on 64-bit and set the CFG bit when emitting guardcf tables

2018-09-19 09:58:30 +00:00

WinEH

IR: print value numbers for unnamed function arguments

2019-08-03 14:28:34 +00:00

X86

[X86][CodeGen][NFC] Delay combineIncDecVector() from DAGCombine to X86DAGToDAGISel

2019-08-29 10:50:09 +00:00

XCore

[lit] Delete empty lines at the end of lit.local.cfg NFC

2019-06-17 09:51:07 +00:00