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676dee6ae9
move instructions for the register allocator to coalesce. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17608 91177308-0d34-0410-b5e6-96231b3b80d8
21 lines
696 B
Plaintext
21 lines
696 B
Plaintext
TODO:
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* poor switch statement codegen
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* load/store to alloca'd array or struct.
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* implement not-R0 register GPR class
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* implement scheduling info
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* implement do-loop pass
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* implement do-loop -> bdnz transform
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* implement powerpc-64 for darwin
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* implement powerpc-64 for aix
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* use stfiwx in float->int
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* should hint to the branch select pass that it doesn't need to print the
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second unconditional branch, so we don't end up with things like:
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b .LBBl42__2E_expand_function_8_674 ; loopentry.24
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b .LBBl42__2E_expand_function_8_42 ; NewDefault
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b .LBBl42__2E_expand_function_8_42 ; NewDefault
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Currently failing tests that should pass:
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* MultiSource
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|- Applications
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| `- hbd: miscompilation
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