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https://github.com/RPCS3/llvm.git
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859fff476d
Constant uniquing tables. This allows distinct ConstantExpr objects with the same operation and different flags. Even though a ConstantExpr "a + b" is either always overflowing or never overflowing (due to being a ConstantExpr), it's still necessary to be able to represent it both with and without overflow flags at the same time within the IR, because the safety of the flag may depend on the context of the use. If the constant really does overflow, it wouldn't ever be safe to use with the flag set, however the use may be in code that is never actually executed. This also makes it possible to merge all the flags tests into a single test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80998 91177308-0d34-0410-b5e6-96231b3b80d8
213 lines
5.3 KiB
LLVM
213 lines
5.3 KiB
LLVM
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
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@addr = external global i64
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define i64 @add_unsigned(i64 %x, i64 %y) {
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; CHECK: %z = add nuw i64 %x, %y
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%z = add nuw i64 %x, %y
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ret i64 %z
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}
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define i64 @sub_unsigned(i64 %x, i64 %y) {
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; CHECK: %z = sub nuw i64 %x, %y
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%z = sub nuw i64 %x, %y
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ret i64 %z
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}
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define i64 @mul_unsigned(i64 %x, i64 %y) {
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; CHECK: %z = mul nuw i64 %x, %y
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%z = mul nuw i64 %x, %y
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ret i64 %z
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}
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define i64 @add_signed(i64 %x, i64 %y) {
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; CHECK: %z = add nsw i64 %x, %y
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%z = add nsw i64 %x, %y
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ret i64 %z
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}
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define i64 @sub_signed(i64 %x, i64 %y) {
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; CHECK: %z = sub nsw i64 %x, %y
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%z = sub nsw i64 %x, %y
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ret i64 %z
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}
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define i64 @mul_signed(i64 %x, i64 %y) {
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; CHECK: %z = mul nsw i64 %x, %y
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%z = mul nsw i64 %x, %y
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ret i64 %z
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}
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define i64 @add_plain(i64 %x, i64 %y) {
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; CHECK: %z = add i64 %x, %y
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%z = add i64 %x, %y
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ret i64 %z
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}
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define i64 @sub_plain(i64 %x, i64 %y) {
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; CHECK: %z = sub i64 %x, %y
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%z = sub i64 %x, %y
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ret i64 %z
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}
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define i64 @mul_plain(i64 %x, i64 %y) {
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; CHECK: %z = mul i64 %x, %y
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%z = mul i64 %x, %y
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ret i64 %z
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}
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define i64 @add_both(i64 %x, i64 %y) {
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; CHECK: %z = add nuw nsw i64 %x, %y
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%z = add nuw nsw i64 %x, %y
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ret i64 %z
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}
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define i64 @sub_both(i64 %x, i64 %y) {
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; CHECK: %z = sub nuw nsw i64 %x, %y
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%z = sub nuw nsw i64 %x, %y
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ret i64 %z
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}
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define i64 @mul_both(i64 %x, i64 %y) {
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; CHECK: %z = mul nuw nsw i64 %x, %y
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%z = mul nuw nsw i64 %x, %y
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ret i64 %z
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}
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define i64 @add_both_reversed(i64 %x, i64 %y) {
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; CHECK: %z = add nuw nsw i64 %x, %y
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%z = add nsw nuw i64 %x, %y
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ret i64 %z
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}
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define i64 @sub_both_reversed(i64 %x, i64 %y) {
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; CHECK: %z = sub nuw nsw i64 %x, %y
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%z = sub nsw nuw i64 %x, %y
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ret i64 %z
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}
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define i64 @mul_both_reversed(i64 %x, i64 %y) {
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; CHECK: %z = mul nuw nsw i64 %x, %y
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%z = mul nsw nuw i64 %x, %y
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ret i64 %z
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}
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define i64 @sdiv_exact(i64 %x, i64 %y) {
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; CHECK: %z = sdiv exact i64 %x, %y
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%z = sdiv exact i64 %x, %y
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ret i64 %z
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}
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define i64 @sdiv_plain(i64 %x, i64 %y) {
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; CHECK: %z = sdiv i64 %x, %y
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%z = sdiv i64 %x, %y
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ret i64 %z
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}
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define i64* @gep_nw(i64* %p, i64 %x) {
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; CHECK: %z = getelementptr inbounds i64* %p, i64 %x
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%z = getelementptr inbounds i64* %p, i64 %x
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ret i64* %z
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}
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define i64* @gep_plain(i64* %p, i64 %x) {
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; CHECK: %z = getelementptr i64* %p, i64 %x
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%z = getelementptr i64* %p, i64 %x
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ret i64* %z
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}
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define i64 @add_both_ce() {
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; CHECK: ret i64 add nuw nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 add nsw nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @sub_both_ce() {
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; CHECK: ret i64 sub nuw nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 sub nsw nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @mul_both_ce() {
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; CHECK: ret i64 mul nuw nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 mul nuw nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @sdiv_exact_ce() {
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; CHECK: ret i64 sdiv exact (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 sdiv exact (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64* @gep_nw_ce() {
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; CHECK: ret i64* getelementptr inbounds (i64* @addr, i64 171)
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ret i64* getelementptr inbounds (i64* @addr, i64 171)
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}
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define i64 @add_plain_ce() {
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; CHECK: ret i64 add (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 add (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @sub_plain_ce() {
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; CHECK: ret i64 sub (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 sub (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @mul_plain_ce() {
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; CHECK: ret i64 mul (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 mul (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @sdiv_plain_ce() {
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; CHECK: ret i64 sdiv (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 sdiv (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64* @gep_plain_ce() {
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; CHECK: ret i64* getelementptr (i64* @addr, i64 171)
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ret i64* getelementptr (i64* @addr, i64 171)
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}
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define i64 @add_both_reversed_ce() {
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; CHECK: ret i64 add nuw nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 add nsw nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @sub_both_reversed_ce() {
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; CHECK: ret i64 sub nuw nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 sub nsw nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @mul_both_reversed_ce() {
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; CHECK: ret i64 mul nuw nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 mul nsw nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @add_signed_ce() {
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; CHECK: ret i64 add nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 add nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @sub_signed_ce() {
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; CHECK: ret i64 sub nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 sub nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @mul_signed_ce() {
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; CHECK: ret i64 mul nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 mul nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @add_unsigned_ce() {
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; CHECK: ret i64 add nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 add nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @sub_unsigned_ce() {
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; CHECK: ret i64 sub nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 sub nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @mul_unsigned_ce() {
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; CHECK: ret i64 mul nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 mul nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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