Chris Lattner 863914feb5 trim down the target info structs now that we have a preferred spill register class for each callee save register ... Why is V9 maintaining these tables manually? ugh! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23561 91177308-0d34-0410-b5e6-96231b3b80d8		2005-09-30 17:38:36 +00:00
..
InstrSched
LiveVar
ModuloScheduling
RegAlloc
.cvsignore
DecomposeMultiDimRefs.cpp
EmitBytecodeToAssembly.cpp
InternalGlobalMapper.cpp
MachineCodeForInstruction.cpp
MachineCodeForInstruction.h
MachineFunctionInfo.cpp
MachineFunctionInfo.h
MachineInstrAnnot.h
Makefile
MappingInfo.cpp
MappingInfo.h
SparcV9_F2.td
SparcV9_F3.td
SparcV9_F4.td
SparcV9.burg.in
SparcV9.td
SparcV9AsmPrinter.cpp
SparcV9BurgISel.cpp
SparcV9BurgISel.h
SparcV9CodeEmitter.cpp
SparcV9CodeEmitter.h
SparcV9FrameInfo.cpp
SparcV9FrameInfo.h
SparcV9Instr.def
SparcV9InstrForest.h
SparcV9InstrInfo.h
SparcV9InstrInfo.td
SparcV9Internals.h
SparcV9JITInfo.cpp
SparcV9JITInfo.h
SparcV9PeepholeOpts.cpp
SparcV9PreSelection.cpp
SparcV9PrologEpilogInserter.cpp
SparcV9RegClassInfo.cpp
SparcV9RegClassInfo.h
SparcV9RegInfo.cpp
SparcV9RegInfo.h
SparcV9RegisterInfo.cpp	trim down the target info structs now that we have a preferred spill register class for each callee save register	2005-09-30 17:38:36 +00:00
SparcV9RegisterInfo.h
SparcV9RegisterInfo.td
SparcV9Relocations.h
SparcV9SchedInfo.cpp
SparcV9StackSlots.cpp
SparcV9TargetMachine.cpp
SparcV9TargetMachine.h
SparcV9TmpInstr.cpp
SparcV9TmpInstr.h