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b983cb0423
This bug was exposed by using nsw/nuw for more aggressive folds in: https://reviews.llvm.org/rL284844 The changes mimic the IR demanded bits logic in InstCombiner::SimplifyDemandedUseBits(), but we can't just flip flag bits in the DAG; we have to create a new node that has the bits cleared. This should fix: https://llvm.org/bugs/show_bug.cgi?id=30841 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285656 91177308-0d34-0410-b5e6-96231b3b80d8
26 lines
701 B
LLVM
26 lines
701 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: llc -mtriple=i386-apple-darwin < %s | FileCheck %s
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; PR30841: https://llvm.org/bugs/show_bug.cgi?id=30841
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; Demanded bits analysis must disable nsw/nuw when it makes a
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; simplification to add/sub such as in this case.
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define i8 @PR30841(i64 %argc) {
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; CHECK-LABEL: PR30841:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: negl %eax
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; CHECK-NEXT: ## kill: %AL<def> %AL<kill> %EAX<kill>
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; CHECK-NEXT: retl
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;
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entry:
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%or = or i64 %argc, -4294967296
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br label %end
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end:
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%neg = sub nuw nsw i64 -4294967296, %argc
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%trunc = trunc i64 %neg to i8
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ret i8 %trunc
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}
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