mirror of
https://github.com/RPCS3/llvm.git
synced 2025-03-05 00:59:19 +00:00
a0be0b1390
Summary: This change allows usage of store instruction for implicit null check. Memory Aliasing Analisys is not used and change conservatively supposes that any store and load may access the same memory. As a result re-ordering of store-store, store-load and load-store is prohibited. Patch by Serguei Katkov! Reviewers: reames, sanjoy Reviewed By: sanjoy Subscribers: atrick, llvm-commits Differential Revision: https://reviews.llvm.org/D29400 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294338 91177308-0d34-0410-b5e6-96231b3b80d8
88 lines
2.4 KiB
YAML
88 lines
2.4 KiB
YAML
# RUN: llc -mtriple=x86_64-apple-macosx10.12.0 -O3 -run-pass=block-placement -o - %s | FileCheck %s
|
|
|
|
--- |
|
|
; ModuleID = 'test.ll'
|
|
source_filename = "test.ll"
|
|
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
|
|
|
declare void @stub(i32*)
|
|
|
|
define i32 @f(i32* %ptr, i1 %cond) {
|
|
entry:
|
|
br i1 %cond, label %left, label %right
|
|
|
|
left: ; preds = %entry
|
|
%is_null = icmp eq i32* %ptr, null
|
|
br i1 %is_null, label %null, label %not_null, !prof !0, !make.implicit !1
|
|
|
|
not_null: ; preds = %left
|
|
%val = load i32, i32* %ptr
|
|
ret i32 %val
|
|
|
|
null: ; preds = %left
|
|
call void @stub(i32* %ptr)
|
|
unreachable
|
|
|
|
right: ; preds = %entry
|
|
call void @stub(i32* null)
|
|
unreachable
|
|
}
|
|
|
|
; Function Attrs: nounwind
|
|
declare void @llvm.stackprotector(i8*, i8**) #0
|
|
|
|
attributes #0 = { nounwind }
|
|
|
|
!0 = !{!"branch_weights", i32 1048575, i32 1}
|
|
!1 = !{}
|
|
|
|
...
|
|
---
|
|
# CHECK: name: f
|
|
name: f
|
|
alignment: 4
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '%rdi' }
|
|
- { reg: '%esi' }
|
|
|
|
# CHECK: %eax = FAULTING_OP 1, %bb.3.null, 1684, killed %rdi, 1, _, 0, _ :: (load 4 from %ir.ptr)
|
|
# CHECK-NEXT: JMP_1 %bb.2.not_null
|
|
# CHECK: bb.3.null:
|
|
# CHECK: bb.4.right:
|
|
# CHECK: bb.2.not_null:
|
|
|
|
body: |
|
|
bb.0.entry:
|
|
successors: %bb.1.left(0x7ffff800), %bb.3.right(0x00000800)
|
|
liveins: %esi, %rdi
|
|
|
|
frame-setup PUSH64r undef %rax, implicit-def %rsp, implicit %rsp
|
|
CFI_INSTRUCTION def_cfa_offset 16
|
|
TEST8ri %sil, 1, implicit-def %eflags, implicit killed %esi
|
|
JE_1 %bb.3.right, implicit killed %eflags
|
|
|
|
bb.1.left:
|
|
successors: %bb.2.null(0x7ffff800), %bb.4.not_null(0x00000800)
|
|
liveins: %rdi
|
|
|
|
%eax = FAULTING_OP 1, %bb.2.null, 1684, killed %rdi, 1, _, 0, _ :: (load 4 from %ir.ptr)
|
|
JMP_1 %bb.4.not_null
|
|
|
|
bb.4.not_null:
|
|
liveins: %rdi, %eax
|
|
|
|
%rcx = POP64r implicit-def %rsp, implicit %rsp
|
|
RETQ %eax
|
|
|
|
bb.2.null:
|
|
liveins: %rdi
|
|
|
|
CALL64pcrel32 @stub, csr_64, implicit %rsp, implicit %rdi, implicit-def %rsp
|
|
|
|
bb.3.right:
|
|
dead %edi = XOR32rr undef %edi, undef %edi, implicit-def dead %eflags, implicit-def %rdi
|
|
CALL64pcrel32 @stub, csr_64, implicit %rsp, implicit %rdi, implicit-def %rsp
|
|
|
|
...
|