llvm/test/CodeGen
Sanjay Patel 28660d4b2f Add a feature flag for slow 32-byte unaligned memory accesses [x86].
This patch adds a feature flag to avoid unaligned 32-byte load/store AVX codegen
for Sandy Bridge and Ivy Bridge. There is no functionality change intended for 
those chips. Previously, the absence of AVX2 was being used as a proxy to detect
this feature. But that hindered codegen for AVX-enabled AMD chips such as btver2
that do not have the 32-byte unaligned access slowdown.

Performance measurements are included in PR21541 ( http://llvm.org/bugs/show_bug.cgi?id=21541 ).

Differential Revision: http://reviews.llvm.org/D6355



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222544 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 17:40:04 +00:00
..
AArch64 DAGCombiner: Allow the DAGCombiner to combine multiple FDIVs with the same divisor info FMULs by the reciprocal. 2014-11-21 06:39:58 +00:00
ARM Fix ARM triple parsing 2014-11-17 14:08:57 +00:00
CPP IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
Generic Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Hexagon Handle ctor/init_array initialization. 2014-11-03 14:56:05 +00:00
Inputs Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Mips [mips][microMIPS] Implement CodeGen support for 16-bit instruction ADDIUR2. 2014-11-19 13:23:58 +00:00
MSP430 Drop the W postfix on the 16-bit registers. 2014-09-10 06:58:14 +00:00
NVPTX [NVPTX] Add NVPTXLowerStructArgs pass 2014-11-05 18:19:30 +00:00
PowerPC [PPC] Use SeparateConstOffsetFromGEP 2014-11-21 04:35:51 +00:00
R600 R600/SI: Make SIInstrInfo::isOperandLegal() more strict 2014-11-19 16:58:49 +00:00
SPARC Add back tests for empty function in SPARC and PowerPC. 2014-09-15 22:11:07 +00:00
SystemZ IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
Thumb [Thumb1] Re-write emitThumbRegPlusImmediate 2014-11-17 11:18:10 +00:00
Thumb2 ARM: allow constpool entry to be moved to the user's block in all cases. 2014-11-13 17:58:53 +00:00
X86 Add a feature flag for slow 32-byte unaligned memory accesses [x86]. 2014-11-21 17:40:04 +00:00
XCore Fix a bit of confusion about .set and produce more readable assembly. 2014-10-21 01:17:30 +00:00