Nate Begeman c3e2db407e i1 loads should also be from the low byte of the argument word. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21077 91177308-0d34-0410-b5e6-96231b3b80d8

2005-04-04 09:09:00 +00:00

..

Alpha

is this simpler? I think it is simpler.

2005-04-03 20:35:21 +00:00

CBackend

Fix the 3 regressions last night, due to my buggy patch from yesterday.

2005-03-19 17:35:11 +00:00

IA64

fix SREM/UREM, which gave incorrect results for x%y if x was zero. This is

2005-04-04 05:05:52 +00:00

PowerPC

i1 loads should also be from the low byte of the argument word.

2005-04-04 09:09:00 +00:00

Skeleton

ignore generated files

2004-11-21 00:01:54 +00:00

Sparc

This mega patch converts us from using Function::a{iterator|begin|end} to

2005-03-15 04:54:21 +00:00

SparcV8

This mega patch converts us from using Function::a{iterator|begin|end} to

2005-03-15 04:54:21 +00:00

SparcV9

Fix another PATypeHolder error, contributed by Bill Wendling!

2005-04-01 15:41:30 +00:00

X86

add support for FABS and FNEG

2005-04-02 05:30:17 +00:00

Makefile

build the IA64 target as a .so for now

2005-03-17 18:29:04 +00:00

MRegisterInfo.cpp

Move destructor out of line to avoid vtable emission in every file that includes the header. Thanks to sabre.

2004-10-27 06:00:53 +00:00

Target.td

Add some bits that can be set for instructions.

2005-01-02 02:27:48 +00:00

TargetData.cpp

add a StructLayout::getElementContainingOffset method.

2005-03-13 19:04:41 +00:00

TargetFrameInfo.cpp

Fix compilation errors with VS 2005, patch contributed by Aaron Gray.

2005-02-17 21:40:27 +00:00

TargetInstrInfo.cpp

Finegrainify namespacification

2005-01-19 06:53:34 +00:00

TargetMachine.cpp

Add a new target-independent code generator flag.

2005-01-15 06:00:32 +00:00

TargetMachineRegistry.cpp

Implement TargetRegistrationListener

2004-07-11 06:03:21 +00:00

TargetSchedInfo.cpp

Improve compatiblity with HPUX on Itanium, patch by Duraid Madina

2005-01-16 01:31:31 +00:00