Daniel Dunbar 895ae9b30d Speculatively revert r76823 (i.e., reapply r75663 and r76805) to see if the real ...

problem is fixed by the TableGen determinism fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79851 91177308-0d34-0410-b5e6-96231b3b80d8

2009-08-23 10:44:51 +00:00

..

Alpha

Make promotion in operation legalization for SETCC work correctly.

2009-07-17 05:16:04 +00:00

ARM

Make x86 test actually test x86 code generation. Fix the

2009-08-22 03:13:10 +00:00

Blackfin

Add XFAIL testcase for setcc undef.

2009-08-15 12:10:22 +00:00

CBackend

Fix an erroneous check for isFNeg; the FNeg case is handled

2009-06-04 23:43:29 +00:00

CellSPU

Add some generic expansion logic for SMULO and UMULO. Fixes UMULO

2009-06-16 06:58:29 +00:00

CPP

Fix code emission for conditional branches.

2009-05-04 19:10:38 +00:00

Generic

Remove the IA-64 backend.

2009-07-24 00:30:09 +00:00

Mips

reintroduce support for Mips "small" section handling. This is

2009-08-13 06:28:06 +00:00

MSP430

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

PIC16

this passes.

2009-08-06 03:55:49 +00:00

PowerPC

Speculatively revert r76823 (i.e., reapply r75663 and r76805) to see if the real

2009-08-23 10:44:51 +00:00

SPARC

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

SystemZ

Add missing RUN line

2009-08-22 00:28:50 +00:00

Thumb

Fix an obvious copy-n-paste bug.

2009-08-20 17:01:04 +00:00

Thumb2

Make tail merging handle blocks with repeated predecessors correctly, and

2009-08-18 15:18:18 +00:00

X86

Make x86 test actually test x86 code generation. Fix the

2009-08-22 03:13:10 +00:00

XCore

Add support for mergeable sections back into the XCore backend.

2009-08-18 21:14:31 +00:00