llvm/test/CodeGen/X86/trunc-to-bool.ll
Reid Spencer 832254e1c2 Changes to support making the shift instructions be true BinaryOperators.
This feature is needed in order to support shifts of more than 255 bits
on large integer types.  This changes the syntax for llvm assembly to
make shl, ashr and lshr instructions look like a binary operator:
   shl i32 %X, 1
instead of
   shl i32 %X, i8 1
Additionally, this should help a few passes perform additional optimizations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33776 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-02 02:16:23 +00:00

62 lines
1.4 KiB
LLVM

; An integer truncation to i1 should be done with an and instruction to make
; sure only the LSBit survives. Test that this is the case both for a returned
; value and as the operand of a branch.
; RUN: llvm-as < %s | llc -march=x86 &&
; RUN: llvm-as < %s | llc -march=x86 | grep '\(and\)\|\(test.*\$1\)' | \
; RUN: wc -l | grep 6
define i1 @test1(i32 %X) zext {
%Y = trunc i32 %X to i1
ret i1 %Y
}
define i1 @test2(i32 %val, i32 %mask) {
entry:
%shifted = ashr i32 %val, %mask
%anded = and i32 %shifted, 1
%trunced = trunc i32 %anded to i1
br i1 %trunced, label %ret_true, label %ret_false
ret_true:
ret i1 true
ret_false:
ret i1 false
}
define i32 @test3(i8* %ptr) {
%val = load i8* %ptr
%tmp = trunc i8 %val to i1
br i1 %tmp, label %cond_true, label %cond_false
cond_true:
ret i32 21
cond_false:
ret i32 42
}
define i32 @test4(i8* %ptr) {
%tmp = ptrtoint i8* %ptr to i1
br i1 %tmp, label %cond_true, label %cond_false
cond_true:
ret i32 21
cond_false:
ret i32 42
}
define i32 @test5(float %f) {
%tmp = fptoui float %f to i1
br i1 %tmp, label %cond_true, label %cond_false
cond_true:
ret i32 21
cond_false:
ret i32 42
}
define i32 @test6(double %d) {
%tmp = fptosi double %d to i1
br i1 %tmp, label %cond_true, label %cond_false
cond_true:
ret i32 21
cond_false:
ret i32 42
}