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Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349368 91177308-0d34-0410-b5e6-96231b3b80d8
18 lines
568 B
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18 lines
568 B
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* Automatically generated file, do not edit! *
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**************************************************
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.. _amdgpu_synid7_base_smem_addr:
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sbase
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===========================
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A 64-bit base address for scalar memory operations.
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*Size:* 2 dwords.
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*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`trap<amdgpu_synid_trap>`
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