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954da37bb4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14622 91177308-0d34-0410-b5e6-96231b3b80d8
132 lines
4.8 KiB
C++
132 lines
4.8 KiB
C++
//===-- SelectionDAG.cpp - Implement the SelectionDAG* classes ------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the SelectionDAG* classes, which are used to perform
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// DAG-based instruction selection in a target-specific manner.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/Type.h"
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#include <iostream>
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using namespace llvm;
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SelectionDAG::~SelectionDAG() {
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for (unsigned i = 0, e = AllNodes.size(); i != e; ++i)
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delete AllNodes[i];
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}
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/// dump - Print out the current Selection DAG...
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void SelectionDAG::dump() const {
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Root->dump(); // Print from the root...
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}
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/// getValueType - Return the ValueType for the specified LLVM type. This
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/// method works on all scalar LLVM types.
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///
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MVT::ValueType SelectionDAG::getValueType(const Type *Ty) const {
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switch (Ty->getTypeID()) {
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case Type::VoidTyID: assert(0 && "Void type object in getValueType!");
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default: assert(0 && "Unknown type in DAGBuilder!\n");
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case Type::BoolTyID: return MVT::i1;
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case Type::SByteTyID:
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case Type::UByteTyID: return MVT::i8;
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case Type::ShortTyID:
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case Type::UShortTyID: return MVT::i16;
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case Type::IntTyID:
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case Type::UIntTyID: return MVT::i32;
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case Type::LongTyID:
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case Type::ULongTyID: return MVT::i64;
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case Type::FloatTyID: return MVT::f32;
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case Type::DoubleTyID: return MVT::f64;
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case Type::LabelTyID:
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case Type::PointerTyID: return PointerType;
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}
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}
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void SelectionDAGNode::dump() const {
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// Print out the DAG in post-order
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std::map<const SelectionDAGNode*, unsigned> NodeIDs;
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unsigned ID = 0;
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printit(0, ID, NodeIDs);
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}
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void SelectionDAGNode::printit(unsigned Offset, unsigned &LastID,
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std::map<const SelectionDAGNode*,
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unsigned> &NodeIDs) const {
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if (!NodeIDs.count(this)) {
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// Emit all of the uses first...
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for (unsigned i = 0, e = Uses.size(); i != e; ++i)
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Uses[i]->printit(Offset+1, LastID, NodeIDs);
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NodeIDs[this] = LastID++;
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std::cerr << std::string(Offset, ' ') << "#" << LastID-1 << " ";
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} else {
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// Node has already been emitted...
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std::cerr << std::string(Offset, ' ') << "#" << NodeIDs[this] << " ";
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}
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switch (ValueType) {
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case MVT::isVoid: std::cerr << "V:"; break;
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case MVT::i1: std::cerr << "i1:"; break;
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case MVT::i8: std::cerr << "i8:"; break;
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case MVT::i16: std::cerr << "i16:"; break;
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case MVT::i32: std::cerr << "i32:"; break;
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case MVT::i64: std::cerr << "i64:"; break;
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case MVT::f32: std::cerr << "f32:"; break;
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case MVT::f64: std::cerr << "f64:"; break;
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default: assert(0 && "Invalid node ValueType!");
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}
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switch (NodeType) {
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case ISD::ChainNode: std::cerr << "ChainNode"; break;
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case ISD::BlockChainNode: std::cerr << "BlockChainNode"; break;
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case ISD::ProtoNode: std::cerr << "ProtoNode"; break;
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case ISD::Constant: std::cerr << "Constant"; break;
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case ISD::FrameIndex: std::cerr << "FrameIndex"; break;
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case ISD::BasicBlock: std::cerr << "BasicBlock"; break;
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case ISD::Plus: std::cerr << "Plus"; break;
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case ISD::Minus: std::cerr << "Minus"; break;
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case ISD::Times: std::cerr << "Times"; break;
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case ISD::SDiv: std::cerr << "SDiv"; break;
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case ISD::UDiv: std::cerr << "UDiv"; break;
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case ISD::SRem: std::cerr << "SRem"; break;
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case ISD::URem: std::cerr << "URem"; break;
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case ISD::And: std::cerr << "And"; break;
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case ISD::Or: std::cerr << "Or"; break;
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case ISD::Xor: std::cerr << "Xor"; break;
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case ISD::SetEQ: std::cerr << "SetEQ"; break;
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case ISD::SetNE: std::cerr << "SetNE"; break;
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case ISD::SetLT: std::cerr << "SetLT"; break;
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case ISD::SetLE: std::cerr << "SetLE"; break;
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case ISD::SetGT: std::cerr << "SetGT"; break;
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case ISD::SetGE: std::cerr << "SetGE"; break;
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case ISD::Br: std::cerr << "Br"; break;
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case ISD::BrCond: std::cerr << "BrCond"; break;
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case ISD::Switch: std::cerr << "Switch"; break;
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case ISD::Ret: std::cerr << "Ret"; break;
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case ISD::RetVoid: std::cerr << "RetVoid"; break;
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case ISD::Load: std::cerr << "Load"; break;
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case ISD::Store: std::cerr << "Store"; break;
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case ISD::PHI: std::cerr << "PHI"; break;
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case ISD::Call: std::cerr << "Call"; break;
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case ISD::Unspec1: std::cerr << "Unspec1"; break;
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case ISD::Unspec2: std::cerr << "Unspec2"; break;
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}
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std::cerr << "\n";
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}
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