Sander de Smalen 321acf353e [AArch64][SVE] Asm: Support for predicated unary operations.
This patch adds support for the following instructions:
  CLS  (Count Leading Sign bits)
  CLZ  (Count Leading Zeros)
  CNT  (Count non-zero bits)
  CNOT (Logically invert boolean condition in vector)
  NOT  (Bitwise invert vector)
  FABS (Floating-point absolute value)
  FNEG (Floating-point negate)

All operations are predicated and unary, e.g.
  clz  z0.s, p0/m, z1.s

- CLS, CLZ, CNT, CNOT and NOT have variants for 8, 16, 32
  and 64 bit elements.

- FABS and FNEG have variants for 16, 32 and 64 bit elements.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336677 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-10 14:05:55 +00:00
..
2018-07-06 13:00:16 +00:00
2018-06-29 08:43:19 +00:00