Files
llvm/test/CodeGen/WebAssembly
Nikita Popov 1d1646072b [WebAssembly] Don't assume that zext/sext result is i32/i64 in fast isel (PR41841)
Usually this will abort fast-isel at the instruction using the
non-legal result, but if the only use is in a different basic block,
we'll incorrectly assume that the zext/sext is to i32 (rather than
i128 in this case).

Differential Revision: https://reviews.llvm.org/D61823

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360616 91177308-0d34-0410-b5e6-96231b3b80d8
2019-05-13 19:40:18 +00:00
..
2019-04-30 19:17:59 +00:00