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8e59cd19150eefbb0777cd8be1d470e093cdbb68
llvm/test/CodeGen/X86
T
History
Sanjay Patel 89fcd8b878 [x86] auto-generate complete checks; NFC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346609 91177308-0d34-0410-b5e6-96231b3b80d8
2018-11-11 14:57:26 +00:00
..
avx512-shuffles
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
GC
Make shell redirection construct portable
2017-07-12 13:24:46 +00:00
GlobalISel
Revert r345165 "[X86] Bring back the MOV64r0 pseudo instruction"
2018-10-31 21:53:24 +00:00
3addr-16bit.ll
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
2018-04-24 22:35:27 +00:00
3addr-or.ll
[DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors.
2018-03-01 22:32:25 +00:00
3dnow-intrinsics.ll
[X86][MMX] Support MMX build vectors to avoid SSE usage (PR29222)
2018-03-11 19:22:13 +00:00
3dnow-schedule.ll
[X86] Add GPR<->XMM Schedule Tags
2018-05-18 17:58:36 +00:00
4char-promote.ll
[X86] Autogenerate complete checks. NFC
2018-11-06 00:31:27 +00:00
2003-08-03-CallArgLiveRanges.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2003-08-23-DeadBlockTest.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2003-11-03-GlobalBool.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2004-02-13-FrameReturnAddress.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2004-02-14-InefficientStackPointer.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2004-02-22-Casts.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2004-03-30-Select-Max.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2004-04-13-FPCMOV-Crash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2004-06-10-StackifierCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2004-10-08-SelectSetCCFold.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2005-01-17-CycleInDAG.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2005-02-14-IllegalAssembler.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2005-05-08-FPStackifierPHI.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-01-19-ISelFoldingBug.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
2006-03-01-InstrSchedBug.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
2006-03-02-InstrSchedBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-04-04-CrossBlockCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-04-27-ISelFoldingBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-05-01-SchedCausingSpills.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-05-02-InstrSched1.ll
…
2006-05-02-InstrSched2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-05-08-CoalesceSubRegClass.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-05-08-InstrSched.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-05-11-InstrSched.ll
Reapply fix PR23384 (part 3 of 3) r304824 (was reverted in r305720).
2017-08-07 19:56:34 +00:00
2006-05-17-VectorArg.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-05-22-FPSetEQ.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-05-25-CycleInDAG.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-07-10-InlineAsmAConstraint.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-07-12-InlineAsmQConstraint.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-07-20-InlineAsm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-07-28-AsmPrint-Long-As-Pointer.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-07-31-SingleRegClass.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-08-07-CycleInDAG.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-08-16-CycleInDAG.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-08-21-ExtraMovInst.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-09-01-CycleInDAG.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-10-02-BoolRetCrash.ll
…
2006-10-09-CycleInDAG.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-10-10-FindModifiedNodeSlotBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-10-12-CycleInDAG.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-10-13-CycleInDAG.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-10-19-SwitchUnnecessaryBranching.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-11-12-CSRetCC.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-11-17-IllegalMove.ll
[X86] Make requested test changes from D50636
2018-08-25 14:16:03 +00:00
2006-11-27-SelectLegalize.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-12-16-InlineAsmCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-12-19-IntelSyntax.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-01-08-InstrSched.ll
Add LiveRangeShrink pass to shrink live range within BB.
2017-05-31 23:25:25 +00:00
2007-01-08-X86-64-Pointer.ll
…
2007-01-13-StackPtrIndex.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-01-29-InlineAsm-ir.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-02-04-OrAddrMode.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-02-16-BranchFold.ll
…
2007-02-19-LiveIntervalAssert.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-02-23-DAGCombine-Miscompile.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-02-25-FastCCStack.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-03-01-SpillerCrash.ll
…
2007-03-15-GEP-Idx-Sink.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-03-16-InlineAsm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-03-18-LiveIntervalAssert.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-03-24-InlineAsmMultiRegConstraint.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-03-24-InlineAsmPModifier.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-03-24-InlineAsmVectorOp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-03-24-InlineAsmXConstraint.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-03-26-CoalescerBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-04-08-InlineAsmCrash.ll
…
2007-04-11-InlineAsmVectorResult.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-04-17-LiveIntervalAssert.ll
…
2007-04-24-Huge-Stack.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-04-24-VectorCrash.ll
…
2007-04-27-InlineAsm-IntMemInput.ll
…
2007-05-05-Personality.ll
…
2007-05-05-VecCastExpand.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-05-14-LiveIntervalAssert.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-05-15-maskmovq.ll
[X86][MMX] Regenerate MMX MASKMOV test
2018-02-21 16:38:08 +00:00
2007-05-17-ShuffleISelBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-06-04-X86-64-CtorAsmBugs.ll
…
2007-06-28-X86-64-isel.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-06-29-DAGCombinerBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-06-29-VecFPConstantCSEBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-07-03-GR64ToVR64.ll
[X86] Regenerate GPR:XMM bitcast test
2018-02-21 15:05:47 +00:00
2007-07-10-StackerAssert.ll
…
2007-07-18-Vector-Extract.ll
…
2007-08-01-LiveVariablesBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-08-09-IllegalX86-64Asm.ll
…
2007-08-10-SignExtSubreg.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-09-05-InvalidAsm.ll
…
2007-09-06-ExtWeakAliasee.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
2007-09-27-LDIntrinsics.ll
…
2007-10-04-AvoidEFLAGSCopy.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-10-12-CoalesceExtSubReg.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-10-12-SpillerUnfold1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-10-12-SpillerUnfold2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-10-14-CoalescerCrash.ll
…
2007-10-15-CoalescerCrash.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2007-10-16-CoalescerCrash.ll
…
2007-10-19-SpillerUnfold.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-10-28-inlineasm-q-modifier.ll
…
2007-10-29-ExtendSetCC.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-10-30-LSRCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-10-31-extractelement-i64.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-11-01-ISelCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-11-03-x86-64-q-constraint.ll
…
2007-11-04-LiveIntervalCrash.ll
…
2007-11-04-LiveVariablesBug.ll
…
2007-11-04-rip-immediate-constant.ll
…
2007-11-06-InstrSched.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-11-07-MulBy4.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-11-30-LoadFolding-Bug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-12-16-BURRSchedCrash.ll
…
2007-12-18-LoadCSEBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-01-08-IllegalCMP.ll
…
2008-01-08-SchedulerCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-01-09-LongDoubleSin.ll
…
2008-01-16-FPStackifierAssert.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-01-16-InvalidDAGCombineXform.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-02-05-ISelCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-02-06-LoadFoldingBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-02-14-BitMiscompile.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
2008-02-18-TailMergingBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-02-20-InlineAsmClobber.ll
…
2008-02-22-LocalRegAllocBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-02-25-InlineAsmBug.ll
…
2008-02-25-X86-64-CoalescerBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-02-26-AsmDirectMemOp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-02-27-DeadSlotElimBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-02-27-PEICrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-03-06-frem-fpstack.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-03-07-APIntBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-03-10-RegAllocInfLoop.ll
…
2008-03-12-ThreadLocalAlias.ll
…
2008-03-13-TwoAddrPassCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-03-14-SpillerCrash.ll
…
2008-03-19-DAGCombinerBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-03-23-DarwinAsmComments.ll
…
2008-03-25-TwoAddrPassBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-03-31-SpillerFoldingBug.ll
…
2008-04-02-unnamedEH.ll
…
2008-04-08-CoalescerCrash.ll
…
2008-04-09-BranchFolding.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-04-15-LiveVariableBug.ll
…
2008-04-16-CoalescerBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-04-16-ReMatBug.ll
…
2008-04-17-CoalescerBug.ll
…
2008-04-24-MemCpyBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-04-24-pblendw-fold-crash.ll
…
2008-04-26-Asm-Optimize-Imm.ll
…
2008-04-28-CoalescerBug.ll
…
2008-04-28-CyclicSchedUnit.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-05-01-InvalidOrdCompare.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-05-09-PHIElimBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-05-09-ShuffleLoweringBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-05-12-tailmerge-5.ll
…
2008-05-21-CoalescerBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-05-22-FoldUnalignedLoad.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-05-28-CoalescerBug.ll
…
2008-05-28-LocalRegAllocBug.ll
…
2008-06-13-NotVolatileLoadStore.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-06-13-VolatileLoadStore.ll
…
2008-06-16-SubregsBug.ll
…
2008-06-25-VecISelBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-07-07-DanglingDeadInsts.ll
…
2008-07-09-ELFSectionAttributes.ll
…
2008-07-11-SHLBy1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-07-16-CoalescerCrash.ll
…
2008-07-19-movups-spills.ll
…
2008-07-22-CombinerCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-07-23-VSetCC.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-08-06-CmpStride.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-08-06-RewriterBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-08-17-UComiCodeGenBug.ll
Recommit r274692 - [X86] Transform setcc + movzbl into xorl + setcc
2016-07-07 22:50:23 +00:00
2008-08-23-64Bit-maskmovq.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-08-31-EH_RETURN32.ll
…
2008-08-31-EH_RETURN64.ll
…
2008-09-05-sinttofp-2xi32.ll
[X86][SSE] Regenerate old sitofp v2i32 test
2018-02-10 14:45:58 +00:00
2008-09-09-LinearScanBug.ll
…
2008-09-11-CoalescerBug2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-09-11-CoalescerBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-09-17-inline-asm-1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-09-18-inline-asm-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-09-19-RegAllocBug.ll
…
2008-09-25-sseregparm-1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-09-26-FrameAddrBug.ll
…
2008-09-29-ReMatBug.ll
…
2008-09-29-VolatileBug.ll
[X86] Switch a test from grep to FileCheck. NFC
2018-04-11 01:05:32 +00:00
2008-10-06-x87ld-nan-1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-10-06-x87ld-nan-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-10-07-SSEISelBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-10-11-CallCrash.ll
…
2008-10-13-CoalescerBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-10-16-VecUnaryOp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-10-17-Asm64bitRConstraint.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-10-20-AsmDoubleInI32.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-10-24-FlippedCompare.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-10-27-CoalescerBug.ll
…
2008-10-29-ExpandVAARG.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-11-03-F80VAARG.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-11-06-testb.ll
…
2008-11-13-inlineasm-3.ll
…
2008-11-29-ULT-Sign.ll
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
2017-01-11 19:55:19 +00:00
2008-12-01-loop-iv-used-outside-loop.ll
…
2008-12-01-SpillerAssert.ll
…
2008-12-02-dagcombine-1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-12-02-dagcombine-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-12-02-dagcombine-3.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-12-02-IllegalResultType.ll
…
2008-12-16-dagcombine-4.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-12-19-EarlyClobberBug.ll
…
2008-12-22-dagcombine-5.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-12-23-crazy-address.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-12-23-dagcombine-6.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-01-13-DoubleUpdate.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-01-16-SchedulerBug.ll
…
2009-01-16-UIntToFP.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-01-18-ConstantExprCrash.ll
…
2009-01-25-NoSSE.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2009-01-26-WrongCheck.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-01-27-NullStrings.ll
…
2009-01-31-BigShift2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-01-31-BigShift3.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-01-31-BigShift.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-02-01-LargeMask.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-02-03-AnalyzedTwice.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-02-04-sext-i64-gep.ll
…
2009-02-08-CoalescerBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-02-09-ivs-different-sizes.ll
…
2009-02-11-codegenprepare-reuse.ll
…
2009-02-12-DebugInfoVLA.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-02-12-InlineAsm-nieZ-constraints.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-02-12-SpillerBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-02-21-ExtWeakInitializer.ll
…
2009-02-25-CommuteBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-02-26-MachineLICMBug.ll
[DAGCombiner] Remove reduceBuildVecConvertToConvertBuildVec and rely on the vectorizers instead (PR35732)
2018-11-02 11:06:18 +00:00
2009-03-03-BitcastLongDouble.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-03-03-BTHang.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-03-05-burr-list-crash.ll
…
2009-03-07-FPConstSelect.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-03-09-APIntCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-03-09-SpillerBug.ll
…
2009-03-10-CoalescerBug.ll
…
2009-03-12-CPAlignBug.ll
…
2009-03-13-PHIElimBug.ll
…
2009-03-16-PHIElimInLPad.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
2009-03-23-i80-fp80.ll
…
2009-03-23-LinearScanBug.ll
…
2009-03-23-MultiUseSched.ll
…
2009-03-25-TestBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-03-26-NoImplicitFPBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-04-12-FastIselOverflowCrash.ll
test/CodeGen/X86: Relax test case
2018-11-10 00:34:09 +00:00
2009-04-12-picrel.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-04-13-2AddrAssert-2.ll
…
2009-04-13-2AddrAssert.ll
…
2009-04-14-IllegalRegs.ll
…
2009-04-16-SpillerUnfold.ll
…
2009-04-24.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-04-25-CoalescerBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-04-27-CoalescerAssert.ll
…
2009-04-27-LiveIntervalsAssert2.ll
…
2009-04-27-LiveIntervalsAssert.ll
…
2009-04-29-IndirectDestOperands.ll
…
2009-04-29-LinearScanBug.ll
…
2009-04-29-RegAllocAssert.ll
…
2009-04-scale.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-05-08-InlineAsmIOffset.ll
…
2009-05-11-tailmerge-crash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-05-19-SingleElementExtractElement.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-05-23-available_externally.ll
…
2009-05-23-dagcombine-shifts.ll
…
2009-05-28-DAGCombineCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-05-30-ISelBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-06-02-RewriterBug.ll
…
2009-06-03-Win64DisableRedZone.ll
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
2017-07-17 20:05:19 +00:00
2009-06-03-Win64SpillXMM.ll
…
2009-06-04-VirtualLiveIn.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-06-05-sitofpCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-06-05-VariableIndexInsert.ll
…
2009-06-05-VZextByteShort.ll
[X86] Autogenerate complete checks. NFC
2018-11-06 00:31:27 +00:00
2009-06-06-ConcatVectors.ll
…
2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-06-15-not-a-tail-call.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-06-18-movlp-shuffle-register.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-07-06-TwoAddrAssert.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-07-07-SplitICmp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-07-09-ExtractBoolFromVector.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-07-15-CoalescerBug.ll
…
2009-07-16-CoalescerBug.ll
…
2009-07-19-AsmExtraOperands.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-07-20-CoalescerBug.ll
…
2009-07-20-DAGCombineBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-08-06-branchfolder-crash.ll
…
2009-08-06-inlineasm.ll
…
2009-08-08-CastError.ll
…
2009-08-12-badswitch.ll
…
2009-08-14-Win64MemoryIndirectArg.ll
…
2009-08-19-LoadNarrowingMiscompile.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-08-23-SubRegReuseUndo.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-09-10-LoadFoldingBug.ll
…
2009-09-10-SpillComments.ll
…
2009-09-16-CoalescerBug.ll
…
2009-09-19-earlyclobber.ll
…
2009-09-21-NoSpillLoopCount.ll
…
2009-09-22-CoalescerBug.ll
…
2009-09-23-LiveVariablesBug.ll
…
2009-10-14-LiveVariablesBug.ll
…
2009-10-16-Scope.ll
…
2009-10-19-atomic-cmp-eflags.ll
[X86] Teach DAG unfoldMemoryOperand to reconvert CMPs to tests
2018-02-05 18:58:58 +00:00
2009-10-19-EmergencySpill.ll
…
2009-10-25-RewriterBug.ll
…
2009-11-04-SubregCoalescingBug.ll
…
2009-11-13-VirtRegRewriterBug.ll
…
2009-11-16-MachineLICM.ll
…
2009-11-16-UnfoldMemOpBug.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2009-11-17-UpdateTerminator.ll
…
2009-11-18-TwoAddrKill.ll
…
2009-11-25-ImpDefBug.ll
…
2009-12-01-EarlyClobberBug.ll
…
2009-12-11-TLSNoRedZone.ll
…
2010-01-05-ZExt-Shl.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2010-01-07-ISelBug.ll
…
2010-01-08-Atomic64Bug.ll
…
2010-01-11-ExtraPHIArg.ll
…
2010-01-13-OptExtBug.ll
…
2010-01-15-SelectionDAGCycle.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2010-01-18-DbgValue.ll
llvm-dwarfdump: Make -brief the default and add a -verbose option instead.
2017-09-11 23:05:20 +00:00
2010-01-19-OptExtBug.ll
…
2010-02-01-DbgValueCrash.ll
…
2010-02-01-TaillCallCrash.ll
…
2010-02-03-DualUndef.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2010-02-04-SchedulerBug.ll
…
2010-02-11-NonTemporal.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2010-02-12-CoalescerBug-Impdef.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
2010-02-15-ImplicitDefBug.ll
…
2010-02-19-TailCallRetAddrBug.ll
Reapply ARM: Do not spill CSR to stack on entry to noreturn functions
2018-04-07 10:57:03 +00:00
2010-02-23-DAGCombineBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2010-02-23-DIV8rDefinesAX.ll
…
2010-02-23-RematImplicitSubreg.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
2010-02-23-SingleDefPhiJoin.ll
…
2010-03-04-Mul8Bug.ll
…
2010-03-05-ConstantFoldCFG.ll
…
2010-03-05-EFLAGS-Redef.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
2010-03-17-ISelBug.ll
…
2010-04-06-SSEDomainFixCrash.ll
…
2010-04-08-CoalescerBug.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2010-04-13-AnalyzeBranchCrash.ll
…
2010-04-21-CoalescerBug.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2010-04-29-CoalescerCrash.ll
…
2010-04-30-LocalAlloc-LandingPad.ll
Elide argument copies during instruction selection
2017-03-01 21:42:00 +00:00
2010-05-03-CoalescerSubRegClobber.ll
…
2010-05-05-LocalAllocEarlyClobber.ll
…
2010-05-06-LocalInlineAsmClobber.ll
…
2010-05-07-ldconvert.ll
…
2010-05-10-DAGCombinerBug.ll
…
2010-05-12-FastAllocKills.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
2010-05-16-nosseconversion.ll
…
2010-05-25-DotDebugLoc.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
2010-05-26-DotDebugLoc.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
2010-05-26-FP_TO_INT-crash.ll
…
2010-05-28-Crash.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
2010-06-01-DeadArg-DbgInfo.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
2010-06-09-FastAllocRegisters.ll
…
2010-06-14-fast-isel-fs-load.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2010-06-15-FastAllocEarlyCLobber.ll
…
2010-06-24-g-constraint-crash.ll
…
2010-06-25-asm-RA-crash.ll
…
2010-06-25-CoalescerSubRegDefDead.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2010-06-28-FastAllocTiedOperand.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2010-06-28-matched-g-constraint.ll
…
2010-07-02-asm-alignstack.ll
…
2010-07-02-UnfoldBug.ll
…
2010-07-06-asm-RIP.ll
…
2010-07-06-DbgCrash.ll
…
2010-07-11-FPStackLoneUse.ll
…
2010-07-13-indirectXconstraint.ll
…
2010-07-15-Crash.ll
…
2010-07-29-SetccSimplify.ll
…
2010-08-04-MaskedSignedCompare.ll
Recommit r343498 "[X86] Improve test instruction shrinking when the sign flag is used and the output of the and is truncated."
2018-10-01 21:35:26 +00:00
2010-08-04-MingWCrash.ll
…
2010-08-04-StackVariable.ll
…
2010-09-01-RemoveCopyByCommutingDef.ll
…
2010-09-16-asmcrash.ll
…
2010-09-16-EmptyFilename.ll
…
2010-09-17-SideEffectsInChain.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2010-09-30-CMOV-JumpTable-PHI.ll
…
2010-10-08-cmpxchg8b.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2010-11-02-DbgParameter.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
2010-11-09-MOVLPS.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2010-11-18-SelectOfExtload.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-01-07-LegalizeTypesCrash.ll
…
2011-01-10-DagCombineHang.ll
…
2011-01-24-DbgValue-Before-Use.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
2011-02-04-FastRegallocNoFP.ll
…
2011-02-12-shuffle.ll
…
2011-02-21-VirtRegRewriter-KillSubReg.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-02-23-UnfoldBug.ll
…
2011-02-27-Fpextend.ll
…
2011-03-02-DAGCombiner.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-03-08-Sched-crash.ll
…
2011-03-09-Physreg-Coalescing.ll
…
2011-03-30-CreateFixedObjCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-04-13-SchedCmpJmp.ll
…
2011-04-19-sclr-bb.ll
…
2011-05-09-loaduse.ll
[X86] Regenerate loaduse test
2018-11-08 19:42:11 +00:00
2011-05-26-UnreachableBlockElim.ll
…
2011-05-27-CrossClassCoalescing.ll
…
2011-06-01-fildll.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-06-03-x87chain.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-06-06-fgetsign80bit.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-06-12-FastAllocSpill.ll
…
2011-06-14-mmx-inlineasm.ll
…
2011-06-14-PreschedRegalias.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-06-19-QuicksortCoalescerBug.ll
…
2011-07-13-BadFrameIndexDisplacement.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-08-23-PerformSubCombine128.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-08-23-Trampoline.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-08-29-BlockConstant.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-08-29-InitOrder.ll
…
2011-09-14-valcoalesce.ll
[CodeGen] Print "%vreg0" as "%0" in both MIR and debug output
2017-11-30 12:12:19 +00:00
2011-09-18-sse2cmp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-09-21-setcc-bug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-10-11-SpillDead.ll
…
2011-10-11-srl.ll
…
2011-10-12-MachineCSE.ll
…
2011-10-18-FastISel-VectorParams.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-10-19-LegelizeLoad.ll
[X86] Autogenerate complete checks. NFC
2018-11-06 00:31:27 +00:00
2011-10-19-widen_vselect.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
2011-10-21-widen-cmp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
2011-10-27-tstore.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-10-30-padd.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-11-07-LegalizeBuildVector.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-11-22-AVX2-Domains.ll
…
2011-11-30-or.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-12-8-bitcastintprom.ll
[X86][SSE] Add ISD::VECTOR_SHUFFLE to faux shuffle decoding (Reapplied)
2018-01-22 12:05:17 +00:00
2011-12-06-AVXVectorExtractCombine.ll
…
2011-12-06-BitcastVectorGlobal.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-12-08-AVXISelBugs.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-12-15-vec_shift.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-12-26-extractelement-duplicate-load.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
2011-12-28-vselecti8.ll
…
2011-20-21-zext-ui2fp.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
2012-1-10-buildvector.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
2012-01-10-UndefExceptionEdge.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2012-01-11-split-cv.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
2012-01-12-extract-sv.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
2012-01-16-mfence-nosse-flags.ll
…
2012-01-18-vbitcast.ll
[X86] Improve type legalization of (v2i32/v4i16/v8i16 (bitcast (v2f32))) to avoid a stack stack temporary.
2018-10-12 22:00:04 +00:00
2012-02-12-dagco.ll
…
2012-02-14-scalar.ll
…
2012-02-23-mmx-inlineasm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2012-02-29-CoalescerBug.ll
…
2012-03-15-build_vector_wl.ll
[X86] Autogenerate complete checks. NFC
2018-11-06 00:31:27 +00:00
2012-03-20-LargeConstantExpr.ll
…
2012-03-26-PostRALICMBug.ll
…
2012-04-09-TwoAddrPassBug.ll
…
2012-04-26-sdglue.ll
[DAGCombiner] narrow vector binops when extraction is cheap
2018-10-30 14:14:34 +00:00
2012-05-17-TwoAddressBug.ll
…
2012-05-19-CoalescerCrash.ll
…
2012-07-10-extload64.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
2012-07-10-shufnorm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2012-07-15-broadcastfold.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2012-07-15-BuildVectorPromote.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2012-07-15-tconst_shl.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2012-07-15-vshl.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2012-07-16-fp2ui-i1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2012-07-16-LeaUndef.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2012-07-17-vtrunc.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2012-07-23-select_cc.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2012-08-07-CmpISelBug.ll
…
2012-08-16-setcc.ll
[X86] Turn X86ISD::AND nodes that have no flag users back into ISD::AND just before isel to enable test instruction matching
2018-02-01 17:08:39 +00:00
2012-08-17-legalizer-crash.ll
…
2012-08-28-UnsafeMathCrash.ll
…
2012-09-13-dagco-fneg.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2012-09-28-CGPBug.ll
…
2012-10-02-DAGCycle.ll
…
2012-10-03-DAGCycle.ll
…
2012-10-18-crash-dagco.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2012-11-28-merge-store-alias.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2012-12-1-merge-multiple.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
2012-12-12-DAGCombineCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2012-12-14-v8fp80-crash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2012-12-19-NoImplicitFloat.ll
…
2013-01-09-DAGCombineBug.ll
…
2013-03-13-VEX-DestReg.ll
…
2013-05-06-ConactVectorCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2013-10-14-FastISel-incorrect-vreg.ll
…
2014-05-29-factorial.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2014-08-29-CompactUnwind.ll
[SCEV] createAddRecFromPHI: Optimize for the most common case.
2017-05-03 23:53:38 +00:00
9601.ll
…
20090313-signext.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
abi-isel.ll
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
2018-08-11 05:33:00 +00:00
absolute-bit-mask-fastisel.ll
[X86] FastISel fall back on !absolute_symbol GVs
2018-08-01 17:44:37 +00:00
absolute-bit-mask.ll
[X86] Change register&memory TEST instructions from MRMSrcMem to MRMDstMem
2017-10-01 23:53:53 +00:00
absolute-bt.ll
IR, X86: Understand !absolute_symbol metadata on global variables.
2016-12-08 19:01:00 +00:00
absolute-cmp.ll
X86: Introduce relocImm-based patterns for cmp.
2017-02-09 22:02:28 +00:00
absolute-constant.ll
IR, X86: Understand !absolute_symbol metadata on global variables.
2016-12-08 19:01:00 +00:00
absolute-rotate.ll
X86: Produce @ABS8 symbol modifiers for absolute symbols in range [0,128).
2017-02-02 00:32:03 +00:00
add32ri8.ll
…
add_shl_constant.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
add-ext.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
add-i64.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
add-of-carry.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
add-sub-nsw-nuw.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
add.ll
[SelectionDAG] allow vector types with isBitwiseNot()
2018-09-19 21:48:30 +00:00
addcarry2.ll
[X86] Extend load-op-store fusion merge to ADC/SBB.
2018-01-19 15:37:57 +00:00
addcarry.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
addr-label-difference.ll
…
addr-mode-matcher.ll
…
addr-of-ret-addr.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
address-type-promotion-constantexpr.ll
…
addrsig.ll
CodeGen: Add two more conditions for adding symbols to the address-significance table.
2018-08-24 20:37:09 +00:00
adx-commute.mir
[X86] Mark the ADCX and ADOX instruction as commutable.
2018-09-08 18:47:56 +00:00
adx-intrinsics-upgrade.ll
[X86] Remove isel patterns for ADCX instruction
2018-09-12 15:47:34 +00:00
adx-intrinsics.ll
[X86] Remove isel patterns for ADCX instruction
2018-09-12 15:47:34 +00:00
adx-schedule.ll
[X86] Split WriteADC/WriteADCRMW scheduler classes
2018-05-17 12:43:42 +00:00
aes_intrinsics.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
aes-schedule.ll
AMD BdVer2 (Piledriver) Initial Scheduler model
2018-10-27 20:46:30 +00:00
alias-gep.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
alias-static-alloca.ll
[DAG] Improve Aliasing of operations to static alloca
2017-07-18 20:06:24 +00:00
aliases.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
aligned-comm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
aligned-variadic.ll
…
alignment-2.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
alignment.ll
…
all-ones-vector.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
alldiv-divdi3.ll
…
alloca-align-rounding-32.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
alloca-align-rounding.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
allrem-moddi3.ll
…
and-encoding.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
and-load-fold.ll
…
and-or-fold.ll
…
and-sink.ll
[DAGCOmbine] Ensure that (brcond (setcc ...)) is handled in a canonical manner.
2018-02-23 11:50:42 +00:00
and-su.ll
Regenerate test results for and-su.ll . NFC
2018-01-27 16:00:10 +00:00
andimm8.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
anyext.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
anyregcc-crash.ll
…
anyregcc.ll
[StackMaps] Increase the size of the "location size" field
2017-04-28 04:48:42 +00:00
apm.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
AppendingLinkage.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
arg-cast.ll
…
arg-copy-elide.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
asm-block-labels.ll
…
asm-global-imm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
asm-indirect-mem.ll
…
asm-invalid-register-class-crasher.ll
…
asm-label2.ll
…
asm-label.ll
…
asm-mismatched-types.ll
…
asm-modifier-P.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
asm-modifier.ll
…
asm-reg-type-mismatch.ll
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
2017-04-26 07:08:44 +00:00
asm-reject-reg-type-mismatch.ll
…
asm-reject-rex.ll
[X86] Reject registers that require a REX prefix in inline asm constraints in 32-bit mode
2018-03-06 18:56:33 +00:00
asm-reject-xmm16.ll
[X86] Reject registers that require a REX prefix in inline asm constraints in 32-bit mode
2018-03-06 18:56:33 +00:00
atom-call-reg-indirect-foldedreload32.ll
…
atom-call-reg-indirect-foldedreload64.ll
…
atom-call-reg-indirect.ll
[LLVM][X86][Goldmont] Adding new target-cpu: Goldmont
2017-06-29 10:00:33 +00:00
atom-cmpb.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atom-fixup-lea1.ll
…
atom-fixup-lea2.ll
[X86] Stop accidentally running the Bonnell LEA fixup path on Goldmont.
2018-07-31 00:43:54 +00:00
atom-fixup-lea3.ll
Reapply fix PR23384 (part 3 of 3) r304824 (was reverted in r305720).
2017-08-07 19:56:34 +00:00
atom-fixup-lea4.ll
…
atom-lea-addw-bug.ll
…
atom-lea-sp.ll
…
atom-pad-short-functions.ll
…
atom-sched.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atom-shuf.ll
[X86] Regenerate atom pshufb test
2018-04-07 19:50:09 +00:00
atomic8.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atomic16.ll
…
atomic32.ll
RegAllocFast: Leave unassigned virtreg entries in map
2018-11-07 06:57:03 +00:00
atomic64.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atomic128.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
atomic6432.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atomic_add.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atomic_idempotent.ll
[X86] Remove RELEASE_ and ACQUIRE_ pseudo instructions. Use isel patterns and the normal instructions instead
2018-08-03 21:40:44 +00:00
atomic_mi.ll
[X86] Fix register resizings for inline assembly register operands.
2018-09-13 20:33:56 +00:00
atomic_op.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atomic-dagsched.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atomic-eflags-reuse.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
atomic-flags.ll
…
atomic-load-store-wide.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atomic-load-store.ll
…
atomic-minmax-i6432.ll
[X86] Add FeatureCMOV explicitly to all CPUs that support it. Remove FeatureCMOV implication from Feature64Bit and FeatureSSE1
2018-08-26 18:29:33 +00:00
atomic-non-integer.ll
[X86] Remove RELEASE_ and ACQUIRE_ pseudo instructions. Use isel patterns and the normal instructions instead
2018-08-03 21:40:44 +00:00
atomic-ops-ancient-64.ll
…
atomic-or.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atomic-pointer.ll
…
Atomics-64.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
attribute-sections.ll
…
avg-mask.ll
[X86] Legalize v32i1 without BWI via splitting to v16i1 rather than the default of promoting to v32i8.
2018-01-23 14:25:39 +00:00
avg.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
avoid_complex_am.ll
…
avoid-lea-scale2.ll
…
avoid-loop-align-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
avoid-loop-align.ll
…
avoid-sfb-kill-flags.mir
[X86] Fix Update Kill Register in Avoid SFB Pass - Bug 37153
2018-04-26 13:16:11 +00:00
avoid-sfb-offset.mir
[X86] - Avoid SFB pass - fix bug in updating the offsets for newly created copies
2018-05-21 16:23:16 +00:00
avoid-sfb-overlaps.ll
[X86] Fix Update Kill Register in Avoid SFB Pass - Bug 37153
2018-04-26 13:16:11 +00:00
avoid-sfb.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
avx1-logical-load-folding.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx2-arith.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx2-cmp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx2-conversions.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx2-fma-fneg-combine.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
avx2-gather.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx2-intrinsics-canonical.ll
[X86] Lowering addus/subus intrinsics to native IR
2018-08-14 08:00:56 +00:00
avx2-intrinsics-fast-isel.ll
[SelectionDAG] Respect multiple uses in SimplifyDemandedBits to SimplifyDemandedVectorElts simplification
2018-10-07 11:45:46 +00:00
avx2-intrinsics-x86-upgrade.ll
[X86] Regenerate test checks to merge 32 and 64 bit. Remove stale check prefixes. NFC
2018-11-04 21:37:43 +00:00
avx2-intrinsics-x86.ll
[X86] Fix a bad bitcast in the load form of vXi16 uniform shift patterns for EVEX encoded instructions.
2018-10-15 21:51:32 +00:00
avx2-logic.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx2-masked-gather.ll
[ScalarizeMaskedMemIntrin] When expanding masked gathers, start with the passthru vector and insert the new load results into it.
2018-09-27 21:28:59 +00:00
avx2-nontemporal.ll
[X86] Modify Nontemporal tests to avoid deadstore optimization.
2017-12-11 15:35:40 +00:00
avx2-phaddsub.ll
[x86] add and use fast horizontal vector math subtarget feature
2018-10-12 16:41:02 +00:00
avx2-pmovxrm.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx2-schedule.ll
[X86] Fix VZEROUPPER scheduling info on SNB,HSW,BDW,SXL,SKX.
2018-11-09 09:49:06 +00:00
avx2-shift.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx2-vbroadcast.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
avx2-vbroadcasti128.ll
[DAG, X86] Revert r327197 "Revert r327170, r327171, r327172"
2018-03-19 20:19:46 +00:00
avx2-vector-shifts.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx2-vperm.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx512-adc-sbb.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx512-any_extend_load.ll
[X86] Remove -mcpu=skx/knl from some tests and use -mattr instead.
2018-04-17 17:30:06 +00:00
avx512-arith.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
avx512-bugfix-23634.ll
[X86][Haswell]: Updating the scheduling information for the Haswell subtarget.
2017-12-08 09:48:44 +00:00
avx512-bugfix-25270.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
avx512-bugfix-26264.ll
[SelectionDAGBuilder] Add masked loads to PendingLoads rather than calling DAG.setRoot.
2018-07-26 23:22:11 +00:00
avx512-build-vector.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx512-calling-conv.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
avx512-cmp-kor-sequence.ll
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
2018-06-27 15:57:53 +00:00
avx512-cmp.ll
[X86] Don't use EXTRACT_ELEMENT from v1i1 with i8/i32 result type when we need to guarantee zeroes in the upper bits of return.
2018-02-28 08:14:28 +00:00
avx512-cvt.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
avx512-cvttp2i.ll
[x86] fix mappings of cvttp2si/cvttp2ui x86 intrinsics to x86-specific nodes and isel patterns (PR37551)
2018-06-14 03:16:58 +00:00
avx512-ext.ll
[X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.
2018-11-09 19:05:51 +00:00
avx512-extract-subvector-load-store.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
avx512-extract-subvector.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx512-fma-commute.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx512-fma-intrinsics-upgrade.ll
[X86] Cleanup some of the avx512 masked fma tests to prepare for removing and autoupgrading.
2018-07-06 03:42:06 +00:00
avx512-fma-intrinsics.ll
[X86] In combineFMA, make sure we bitcast the result of isFNEG back the expected type before creating the new FMA node.
2018-07-09 17:43:24 +00:00
avx512-fma.ll
[X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.
2018-11-09 19:05:51 +00:00
avx512-fsel.ll
MachO: trap unreachable instructions
2018-04-13 22:25:20 +00:00
avx512-gather-scatter-intrin.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx512-gfni-intrinsics.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512-hadd-hsub.ll
[DAGCombiner] narrow vector binops when extraction is cheap
2018-10-30 14:14:34 +00:00
avx512-i1test.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
avx512-inc-dec.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
avx512-insert-extract_i1.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx512-insert-extract.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
avx512-intel-ocl.ll
[X86] Fix Windows i1 zeroext conventions to use i8 instead of i32
2018-03-26 18:49:48 +00:00
avx512-intrinsics-canonical.ll
[X86] Add support for combining FMSUB/FNMADD/FNMSUB ISD nodes with an fneg input.
2018-07-05 02:52:56 +00:00
avx512-intrinsics-fast-isel.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
avx512-intrinsics-upgrade.ll
[X86] Stop promoting vector and/or/xor/andn to vXi64.
2018-10-26 17:21:26 +00:00
avx512-intrinsics.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
avx512-load-store.ll
[X86] Add new patterns for masked scalar load/store to match clang's codegen from r331958.
2018-05-10 21:49:16 +00:00
avx512-load-trunc-store-i1.ll
[X86] Combine (store (v1i1 (scalar_to_vector (i8 X)))) -> (store (i8 X)).
2018-03-04 01:48:02 +00:00
avx512-logic.ll
[X86] Stop promoting vector and/or/xor/andn to vXi64.
2018-10-26 17:21:26 +00:00
avx512-mask-op.ll
[X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.
2018-11-09 19:05:51 +00:00
avx512-mask-spills.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx512-mask-zext-bugfix.ll
RegAllocFast: Leave unassigned virtreg entries in map
2018-11-07 06:57:03 +00:00
avx512-masked_memop-16-8.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx512-masked-memop-64-32.ll
[X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.
2018-11-09 19:05:51 +00:00
avx512-memfold.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx512-mov.ll
[X86] Use vptestm/vptestnm for comparisons with zero to avoid creating a zero vector.
2018-01-27 20:19:09 +00:00
avx512-nontemporal.ll
[X86] Modify Nontemporal tests to avoid deadstore optimization.
2017-12-11 15:35:40 +00:00
avx512-pmovxrm.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx512-regcall-Mask.ll
[X86] Fix register resizings for inline assembly register operands.
2018-09-13 20:33:56 +00:00
avx512-regcall-NoMask.ll
[X86] Enable the MachineVerifier by default
2018-10-29 16:57:43 +00:00
avx512-rndscale.ll
[X86] Add full set of patterns for turning ceil/floor/trunc/rint/nearbyint into rndscale with loads, broadcast, and masking.
2018-07-17 05:48:48 +00:00
avx512-rotate.ll
[X86] Remove masking from avx512 rotate intrinsics. Use select in IR instead.
2018-06-30 01:32:04 +00:00
avx512-scalar_mask.ll
[X86] Remove and autoupgrade the scalar fma intrinsics with masking.
2018-07-12 00:29:56 +00:00
avx512-scalar.ll
[X86] Teach EVEX->VEX pass to turn VRNDSCALE into VROUND when bits 7:4 of the immediate are 0 and the regular EVEX->VEX checks pass.
2018-02-13 04:19:26 +00:00
avx512-scalarIntrinsics.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx512-schedule.ll
[X86] Fix VZEROUPPER scheduling info on SNB,HSW,BDW,SXL,SKX.
2018-11-09 09:49:06 +00:00
avx512-select.ll
[X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.
2018-11-09 19:05:51 +00:00
avx512-shift.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx512-shuffle-schedule.ll
[X86] Remove all the vector NOP bitcast patterns. Use a few lines of code in the Select method in X86ISelDAGToDAG.cpp instead.
2018-08-03 07:01:10 +00:00
avx512-skx-insert-subvec.ll
[DAGCombiner] narrow vector binops when extraction is cheap
2018-10-30 14:14:34 +00:00
avx512-trunc.ll
[X86] Move the promotion of v16i16->v16i8 for avx512f but not avx512bw from lowering to isel. Change to use vpmovzx instead of vpmovsx.
2018-11-09 20:09:53 +00:00
avx512-unsafe-fp-math.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx512-vbroadcast.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
avx512-vbroadcasti128.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
avx512-vbroadcasti256.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx512-vec3-crash.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx512-vec-cmp.ll
[X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.
2018-11-09 19:05:51 +00:00
avx512-vpclmulqdq.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512-vpermv3-commute.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx512-vpternlog-commute.ll
[X86] Remove masking from vpternlog intrinsics. Use a select in IR instead.
2018-05-21 20:58:09 +00:00
avx512-vselect-crash.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx512-vselect.ll
[X86] Use vpmovq2m/vpmovd2m for truncate to vXi1 when possible.
2018-02-19 22:07:31 +00:00
avx512bw-arith.ll
[X86][AVX512BW] Regenerate arithmetic tests using update_llc_test_checks.py script
2018-06-03 14:31:30 +00:00
avx512bw-intrinsics-canonical.ll
[X86] Lowering addus/subus intrinsics to native IR
2018-08-14 08:00:56 +00:00
avx512bw-intrinsics-fast-isel.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512bw-intrinsics-upgrade.ll
[X86] Remove masking from the 512-bit padds and psubs intrinsics. Use select in IR instead.
2018-08-16 06:20:24 +00:00
avx512bw-intrinsics.ll
[X86] Fix a bad bitcast in the load form of vXi16 uniform shift patterns for EVEX encoded instructions.
2018-10-15 21:51:32 +00:00
avx512bw-mask-op.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
avx512bw-mov.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx512bw-vec-cmp.ll
[X86] Stop swapping the operands of AVX512 setge.
2018-02-19 19:23:35 +00:00
avx512bw-vec-test-testn.ll
[X86] Add DAG combine to turn (bitcast (and/or/xor (bitcast X), Y)) -> (and/or/xor X, (bitcast Y)) when casting between GPRs and mask operations.
2018-02-04 01:43:48 +00:00
avx512bwvl-arith.ll
[X86][AVX512BW] Regenerate arithmetic tests using update_llc_test_checks.py script
2018-06-03 14:31:30 +00:00
avx512bwvl-intrinsics-canonical.ll
[X86] Lowering addus/subus intrinsics to native IR
2018-08-14 08:00:56 +00:00
avx512bwvl-intrinsics-fast-isel.ll
[X86] Fast-isel tests for lowered truncation intrinsics
2018-07-10 08:26:54 +00:00
avx512bwvl-intrinsics-upgrade.ll
[X86] Remove the unused masked 128 and 256-bit masked padds/psubs intrinsics.
2018-08-16 06:20:22 +00:00
avx512bwvl-intrinsics.ll
[X86] Remove the unused masked 128 and 256-bit masked padds/psubs intrinsics.
2018-08-16 06:20:22 +00:00
avx512bwvl-mov.ll
[X86] Use vptestm/vptestnm for comparisons with zero to avoid creating a zero vector.
2018-01-27 20:19:09 +00:00
avx512bwvl-vec-cmp.ll
[X86] Stop swapping the operands of AVX512 setge.
2018-02-19 19:23:35 +00:00
avx512bwvl-vec-test-testn.ll
[X86] Add some non-AVX512VL command lines to the *vl-vec-test-testn.ll tests.
2018-10-25 18:23:48 +00:00
avx512cd-intrinsics-fast-isel.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512cd-intrinsics-upgrade.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512cd-intrinsics.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512cdvl-intrinsics-upgrade.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512cdvl-intrinsics.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512dq-intrinsics-fast-isel.ll
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
2018-06-27 15:57:53 +00:00
avx512dq-intrinsics-upgrade.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
avx512dq-intrinsics.ll
[X86] Add intrinsics for KTEST instructions.
2018-08-31 21:31:53 +00:00
avx512dq-mask-op.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
avx512dqvl-intrinsics-fast-isel.ll
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
2018-06-27 15:57:53 +00:00
avx512dqvl-intrinsics-upgrade.ll
[X86] Redefine avx512 packed fpclass intrinsics to return a vXi1 mask and implement the mask input argument using an 'and' IR instruction.
2018-06-26 01:37:02 +00:00
avx512dqvl-intrinsics.ll
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
2018-06-27 15:57:53 +00:00
avx512er-intrinsics.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512f-vec-test-testn.ll
[X86] Reduce the number of isel pattern variations needed for VPTESTM/VPTESTNM matching.
2018-02-19 19:23:31 +00:00
avx512ifma-intrinsics-fast-isel.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512ifma-intrinsics-upgrade.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512ifma-intrinsics.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512ifmavl-intrinsics-fast-isel.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512ifmavl-intrinsics-upgrade.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512ifmavl-intrinsics.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512vbmi2-intrinsics-fast-isel.ll
[X86] Remove masking from avx512vbmi2 concat and shift by immediate intrinsics. Use select in IR instead.
2018-06-13 07:19:21 +00:00
avx512vbmi2-intrinsics-upgrade.ll
[X86] Remove masking from avx512vbmi2 concat and shift by immediate intrinsics. Use select in IR instead.
2018-06-13 07:19:21 +00:00
avx512vbmi2-intrinsics.ll
[X86] Remove masking from avx512vbmi2 concat and shift by immediate intrinsics. Use select in IR instead.
2018-06-13 07:19:21 +00:00
avx512vbmi2vl-intrinsics-fast-isel.ll
[X86] Remove masking from avx512vbmi2 concat and shift by immediate intrinsics. Use select in IR instead.
2018-06-13 07:19:21 +00:00
avx512vbmi2vl-intrinsics-upgrade.ll
[X86] Remove masking from avx512vbmi2 concat and shift by immediate intrinsics. Use select in IR instead.
2018-06-13 07:19:21 +00:00
avx512vbmi2vl-intrinsics.ll
[X86] Remove masking from avx512vbmi2 concat and shift by immediate intrinsics. Use select in IR instead.
2018-06-13 07:19:21 +00:00
avx512vbmi-intrinsics-fast-isel.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512vbmi-intrinsics-upgrade.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512vbmi-intrinsics.ll
[X86][AVX512] Change mask ops on vpermi2var tests to not use zeroinitializer.
2018-11-02 19:39:41 +00:00
avx512vbmivl-intrinsics-fast-isel.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512vbmivl-intrinsics-upgrade.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512vbmivl-intrinsics.ll
[X86][AVX512] Change mask ops on vpermi2var tests to not use zeroinitializer.
2018-11-02 19:39:41 +00:00
avx512vl_vnni-intrinsics-upgrade.ll
[X86] Remove and autoupgrade masked avx512vnni intrinsics using the unmasked intrinsics and select instructions.
2018-06-03 23:24:17 +00:00
avx512vl_vnni-intrinsics.ll
[X86] Remove and autoupgrade masked avx512vnni intrinsics using the unmasked intrinsics and select instructions.
2018-06-03 23:24:17 +00:00
avx512vl-arith.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
avx512vl-intrinsics-canonical.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512vl-intrinsics-fast-isel.ll
[X86] Fast-isel tests for lowered truncation intrinsics
2018-07-10 08:26:54 +00:00
avx512vl-intrinsics-upgrade.ll
[SelectionDAG] Add SimplifyDemandedBits to SimplifyDemandedVectorElts simplification
2018-10-06 10:20:04 +00:00
avx512vl-intrinsics.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
avx512vl-logic.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx512vl-mov.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
avx512vl-nontemporal.ll
[X86] Modify Nontemporal tests to avoid deadstore optimization.
2017-12-11 15:35:40 +00:00
avx512vl-vbroadcast.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
avx512vl-vec-cmp.ll
[X86] Stop swapping the operands of AVX512 setge.
2018-02-19 19:23:35 +00:00
avx512vl-vec-masked-cmp.ll
[X86] Move promotion of vector and/or/xor from legalization to DAG combine
2018-10-15 01:51:58 +00:00
avx512vl-vec-test-testn.ll
[X86] Add some non-AVX512VL command lines to the *vl-vec-test-testn.ll tests.
2018-10-25 18:23:48 +00:00
avx512vl-vpclmulqdq.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512vlcd-intrinsics-fast-isel.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512vnni-intrinsics-upgrade.ll
[X86] Remove and autoupgrade masked avx512vnni intrinsics using the unmasked intrinsics and select instructions.
2018-06-03 23:24:17 +00:00
avx512vnni-intrinsics.ll
[X86] Remove and autoupgrade masked avx512vnni intrinsics using the unmasked intrinsics and select instructions.
2018-06-03 23:24:17 +00:00
avx512vpopcntdq-intrinsics.ll
[X86][AVX512] Cleanup intrinsics tests
2018-06-03 14:56:04 +00:00
avx512vpopcntdq-schedule.ll
[X86] Fix VZEROUPPER scheduling info on SNB,HSW,BDW,SXL,SKX.
2018-11-09 09:49:06 +00:00
avx-arith.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-basic.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
avx-bitcast.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-brcond.ll
Regenrate test results for avx-brcond.ll . NFC
2018-01-27 16:44:00 +00:00
avx-cast.ll
[X86][SSE] Utilize ZeroableElements for canWidenShuffleElements
2018-07-12 13:29:41 +00:00
avx-cmp.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
avx-cvt-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-cvt-3.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-cvt.ll
[X86] Add isel patterns for folding loads when creating ROUND instructions from ffloor/fnearbyint/fceil/frint/ftrunc.
2018-06-12 00:48:57 +00:00
avx-cvttp2si.ll
[DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros
2018-06-27 18:16:40 +00:00
avx-fp2int.ll
[X86] Autogenerate complete checks. NFC
2018-11-06 00:31:27 +00:00
avx-gfni-intrinsics.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-insertelt.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx-intel-ocl.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
avx-intrinsics-fast-isel.ll
[X86] Add patterns for vector and/or/xor/andn with other types than vXi64.
2018-10-22 06:30:22 +00:00
avx-intrinsics-x86_64.ll
[X86][SSE] Cleanup AVX1 intrinsics tests
2018-06-02 21:35:48 +00:00
avx-intrinsics-x86-upgrade.ll
[X86] Prefer blendi over movss/sd when avx512 is enabled unless optimizing for size.
2018-07-14 02:05:08 +00:00
avx-intrinsics-x86.ll
[X86] Lowering sqrt intrinsics to native IR
2018-06-15 18:05:24 +00:00
avx-isa-check.ll
[X86][AVX-512] Allow EVEX encoded instruction selection when available for mul v8i32.
2017-05-04 07:34:58 +00:00
avx-load-store.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
avx-logic.ll
[DAGCombiner] narrow vector binops when extraction is cheap
2018-10-30 14:14:34 +00:00
avx-minmax.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
avx-schedule.ll
[X86] Fix VZEROUPPER scheduling info on SNB,HSW,BDW,SXL,SKX.
2018-11-09 09:49:06 +00:00
avx-select.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-shift.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-shuffle-x86_32.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-splat.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
avx-trunc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-unpack.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-varargs-x86_64.ll
…
avx-vbroadcast.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
avx-vbroadcastf128.ll
[x86] fix uses check in broadcast transform (PR38949)
2018-09-16 15:41:56 +00:00
avx-vextractf128.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-vinsertf128.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
avx-vpclmulqdq.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-vperm2x128.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
avx-vzeroupper.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
avx-win64-args.ll
…
avx-win64.ll
…
avx.ll
Add LiveRangeShrink pass to shrink live range within BB.
2017-05-31 23:25:25 +00:00
backpropmask.ll
[x86] restore test comment; NFC
2018-06-08 13:53:13 +00:00
bad-tls-fold.mir
[x86] Fix nasty bug in the x86 backend that is essentially impossible to
2018-02-07 23:59:14 +00:00
barrier-sse.ll
…
barrier.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
base-pointer-and-cmpxchg.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
basic-promote-integers.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
bc-extract.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
bigstructret2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
bigstructret.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
bit-piece-comment.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
bit-test-shift.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
bitcast2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
bitcast-and-setcc-128.ll
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32.
2018-10-09 19:05:50 +00:00
bitcast-and-setcc-256.ll
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32.
2018-10-09 19:05:50 +00:00
bitcast-and-setcc-512.ll
[SelectionDAG][ARM][X86] Teach PromoteIntRes_SETCC to do a better job picking the result type for the setcc.
2018-03-15 23:04:11 +00:00
bitcast-i256.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
bitcast-int-to-vector-bool-sext.ll
[X86] Stop promoting vector and/or/xor/andn to vXi64.
2018-10-26 17:21:26 +00:00
bitcast-int-to-vector-bool-zext.ll
[X86] Stop promoting vector and/or/xor/andn to vXi64.
2018-10-26 17:21:26 +00:00
bitcast-int-to-vector-bool.ll
[X86][AVX] Enable lowerVectorShuffleAsLanePermuteAndPermute v16i16/v32i8 unary shuffle lowering
2018-10-21 17:07:50 +00:00
bitcast-int-to-vector.ll
[X86] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector.
2018-10-11 20:36:06 +00:00
bitcast-mmx.ll
[X86] Stop printing moves between VR64 and GR64 with 'movd' mnemonic. Use 'movq' instead.
2018-01-05 20:55:12 +00:00
bitcast-setcc-128.ll
[X86] Stop promoting vector and/or/xor/andn to vXi64.
2018-10-26 17:21:26 +00:00
bitcast-setcc-256.ll
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32.
2018-10-09 19:05:50 +00:00
bitcast-setcc-512.ll
[X86] Add a custom legalization for (i16 (bitcast v16i1)) and (i32 (bitcast v32i1)) without AVX512 to prevent scalarization
2018-02-26 20:32:27 +00:00
bitcast.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
bitcnt-false-dep.ll
[X86] Enable popcnt false dependency breaking on Silvermont and Goldmont.
2018-04-19 19:25:24 +00:00
bitreverse.ll
[LegalizeTypes] Prevent an assertion from PromoteIntRes_BSWAP and PromoteIntRes_BITREVERSE if the shift amount is too large for the VT returned by getShiftAmountTy
2018-10-13 17:47:20 +00:00
block-placement.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
block-placement.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
bmi2-schedule.ll
Revert rL342916: [X86] Remove shift/rotate by CL memory (RMW) overrides
2018-09-25 13:01:26 +00:00
bmi2-x86_64.ll
[X86][BMI2] Test i32 intrinsics on 32/64 bits + branch off i64 tests
2018-06-02 17:22:13 +00:00
bmi2.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
bmi-intrinsics-fast-isel-x86_64.ll
[X86] Update tzcnt fast-isel tests to match clang r343126.
2018-09-26 17:19:28 +00:00
bmi-intrinsics-fast-isel.ll
[X86] Update tzcnt fast-isel tests to match clang r343126.
2018-09-26 17:19:28 +00:00
bmi-schedule.ll
AMD BdVer2 (Piledriver) Initial Scheduler model
2018-10-27 20:46:30 +00:00
bmi-x86_64.ll
[X86] Disable BMI BEXTR in X86DAGToDAGISel::matchBEXTRFromAnd unless we're on compiling for a CPU with single uop BEXTR
2018-09-30 03:01:46 +00:00
bmi.ll
[X86] Disable BMI BEXTR in X86DAGToDAGISel::matchBEXTRFromAnd unless we're on compiling for a CPU with single uop BEXTR
2018-09-30 03:01:46 +00:00
bool-ext-inc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
bool-math.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
bool-simplify.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
bool-vector.ll
[X86] Allow movmskpd/ps ISD nodes to be created and selected with integer input types.
2018-09-25 23:28:27 +00:00
bool-zext.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
br-fold.ll
[MinGW] [X86] Add stubs for references to data variables that might end up imported from a dll
2018-08-29 17:28:34 +00:00
branchfolding-catchpads.ll
Avoid infinite loops in branch folding
2016-12-12 23:05:38 +00:00
branchfolding-debugloc.ll
[CodeGen] Add a new pass for PostRA sink
2018-03-22 20:06:47 +00:00
branchfolding-landingpads.ll
…
branchfolding-undef.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
brcond.ll
Regenrate brcond.ll test results. NFC
2018-01-27 16:57:15 +00:00
break-anti-dependencies.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
break-false-dep.ll
[X86] Add avx512vl command line to break-false-dep.ll
2018-07-03 04:43:49 +00:00
broadcast-elm-cross-splat-vec.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
broadcastm-lowering.ll
[X86] Use setcc ISD opcode for AVX512 integer comparisons all the way to isel
2018-06-20 21:05:02 +00:00
bss_pagealigned.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
bswap_tree2.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
bswap_tree.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
bswap-inline-asm.ll
…
bswap-rotate.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
bswap-vector.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
bswap-wide-int.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
bswap.ll
[LegalizeTypes] Prevent an assertion from PromoteIntRes_BSWAP and PromoteIntRes_BITREVERSE if the shift amount is too large for the VT returned by getShiftAmountTy
2018-10-13 17:47:20 +00:00
bt.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
btc_bts_btr.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
btq.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
bug26810.ll
Take into account the cost of local intervals when selecting split candidate.
2018-01-31 13:31:08 +00:00
bug37521.ll
DAG: Fix crash on shift with large shift amounts
2018-05-18 21:54:16 +00:00
build-vector-128.ll
[X86][SSE] Don't vectorize splat buildvector of binops (PR30780)
2017-12-31 17:07:47 +00:00
build-vector-256.ll
[X86][SSE] Don't vectorize splat buildvector of binops (PR30780)
2017-12-31 17:07:47 +00:00
build-vector-512.ll
[X86] Remove some composite MOVSS/MOVSD isel patterns.
2018-07-11 04:51:40 +00:00
buildvec-insertvec.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
bypass-slow-division-32.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
bypass-slow-division-64.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
bypass-slow-division-tune.ll
[CodeGenPrepare] Disable div bypass when working set size is huge.
2017-11-14 19:31:51 +00:00
byval2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
byval3.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
byval4.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
byval5.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
byval6.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
byval7.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
byval-align.ll
…
byval-callee-cleanup.ll
…
byval.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
cache-intrinsic.ll
…
call-imm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
call-push.ll
…
cas.ll
…
cast-vsel.ll
[X86] Don't emit *_extend_vector_inreg nodes when both the input and output types are legal with AVX1
2018-11-02 21:09:49 +00:00
catch.ll
Align stubs for external and common global variables to pointer size.
2018-04-02 23:20:30 +00:00
catchpad-dynamic-alloca.ll
…
catchpad-lifetime.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
catchpad-realign-savexmm.ll
…
catchpad-regmask.ll
…
catchpad-reuse.ll
[WinEH] Allow catchpads to reuse the same catch object
2016-10-19 17:08:23 +00:00
catchpad-weight.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
catchret-empty-fallthrough.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
catchret-fallthrough.ll
…
catchret-regmask.ll
…
cfi-inserter-cfg-with-merge.mir
Use iteration instead of recursion in CFIInserter
2018-05-11 15:54:46 +00:00
cfi-inserter-check-order.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
cfi-inserter-noreturnblock.mir
Allow inconsistent offsets for 'noreturn' basic blocks when '-verify-cfiinstrs'
2018-08-30 17:31:38 +00:00
cfi-inserter-verify-inconsistent-offset.mir
Add option -verify-cfiinstrs to run verifier in CFIInstrInserter
2018-05-07 14:09:33 +00:00
cfi-inserter-verify-inconsistent-register.mir
Add option -verify-cfiinstrs to run verifier in CFIInstrInserter
2018-05-07 14:09:33 +00:00
cfi-xmm.ll
[X86] Output cfi directives for saved XMM registers even if no GPRs are saved
2017-11-18 06:23:48 +00:00
cfi.ll
…
cfstring.ll
…
chain_order.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
change-compare-stride-1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
change-compare-stride-trickiness-0.ll
…
change-compare-stride-trickiness-1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
change-compare-stride-trickiness-2.ll
…
change-unsafe-fp-math.ll
[TM] Restore default TargetOptions in TargetMachine::resetTargetOptions.
2017-01-10 23:43:04 +00:00
cldemote-intrinsic.ll
[X86] Introduce cldemote instruction
2018-04-13 07:35:08 +00:00
cleanuppad-inalloca.ll
…
cleanuppad-large-codemodel.ll
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
2018-07-23 21:14:35 +00:00
cleanuppad-realign.ll
…
clear_upper_vector_element_bits.ll
[SelectionDAG] Add FoldBUILD_VECTOR to simplify new BUILD_VECTOR nodes
2018-10-30 10:32:11 +00:00
clear-highbits.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
clear-lowbits.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
clflushopt-schedule.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
clflushopt.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
clwb-schedule.ll
[X86][SandyBridge] SBWriteResPair +5cy Memory Folds
2018-04-06 11:00:51 +00:00
clwb.ll
[X86] Split up -march=icelake to -client & -server
2018-04-10 18:59:13 +00:00
clz.ll
[X86] Add test cases that exercise the BSR/BSF optimization combineCMov.
2018-02-06 21:47:04 +00:00
clzero-schedule.ll
[CodeGen] assume max/default throughput for unspecified instructions
2018-06-05 23:34:45 +00:00
clzero.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cmov-double.ll
…
cmov-fp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
cmov-into-branch.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
cmov-promotion.ll
[X86] Allow CMOVs of constants to be sign extended from i32.
2018-02-16 07:16:15 +00:00
cmov-schedule.ll
AMD BdVer2 (Piledriver) Initial Scheduler model
2018-10-27 20:46:30 +00:00
cmov.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
cmovcmov.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
cmp-fast-isel.ll
…
cmp.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
cmpxchg8b_alloca_regalloc_handling.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
cmpxchg8b.ll
[X86] Regenerate cmpxchg tests
2018-02-28 22:57:23 +00:00
cmpxchg16b.ll
[X86] Regenerate cmpxchg tests
2018-02-28 22:57:23 +00:00
cmpxchg-clobber-flags.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
cmpxchg-i1.ll
Recommit r274692 - [X86] Transform setcc + movzbl into xorl + setcc
2016-07-07 22:50:23 +00:00
cmpxchg-i128-i1.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
coal-sections.ll
…
coalesce_commute_movsd.ll
[X86] Prefer blendi over movss/sd when avx512 is enabled unless optimizing for size.
2018-07-14 02:05:08 +00:00
coalesce_commute_subreg.ll
…
coalesce-dbg-value-subreg-rewrite.mir
MachineOperand/MIParser: Do not print debug-use flag, infer it
2018-10-30 23:28:27 +00:00
coalesce-dead-lanes.mir
[RegisterCoalescer] Do not assert when trying to remat dead values
2018-08-21 07:49:05 +00:00
coalesce-esp.ll
…
coalesce-implicitdef.ll
…
coalescer-commute1.ll
…
coalescer-commute2.ll
…
coalescer-commute3.ll
…
coalescer-commute4.ll
…
coalescer-commute5.ll
…
coalescer-cross.ll
…
coalescer-dce2.ll
…
coalescer-dce.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
coalescer-identity.ll
…
coalescer-remat.ll
…
coalescer-subreg.ll
…
coalescer-win64.ll
Win64: Don't emit unwind info for "leaf" functions (PR30337)
2016-09-22 19:50:05 +00:00
code_placement_align_all.ll
…
code_placement_cold_loop_blocks.ll
Revert Revert [MBP] do not rotate loop if it creates extra branch
2017-07-11 08:34:58 +00:00
code_placement_eh.ll
…
code_placement_ignore_succ_in_inner_loop.ll
…
code_placement_loop_rotation2.ll
…
code_placement_loop_rotation3.ll
[llvm] Remove redundant --check-prefix=CHECK from tests
2016-10-24 18:57:55 +00:00
code_placement_loop_rotation.ll
…
code_placement.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
code-model-elf-memset.ll
[ELF] Fix large code model MIR verifier errors
2018-10-24 22:57:28 +00:00
code-model-elf.ll
[ELF] Fix large code model MIR verifier errors
2018-10-24 22:57:28 +00:00
code-model-kernel.ll
Restore correct x86_64 EH encodings in kernel code model
2018-08-13 06:06:53 +00:00
codegen-prepare-addrmode-sext.ll
Turn on -addr-sink-using-gep by default.
2017-04-06 22:42:18 +00:00
codegen-prepare-cast.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
codegen-prepare-crash.ll
…
codegen-prepare-extload.ll
[CodeGenPrep]Restructure promoting Ext to form ExtLoad
2017-03-17 19:05:21 +00:00
codegen-prepare.ll
Turn on -addr-sink-using-gep by default.
2017-04-06 22:42:18 +00:00
codemodel.ll
…
coff-comdat2.ll
…
coff-comdat3.ll
…
coff-comdat.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
coff-feat00.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
coff-no-dead-strip.ll
[CodeGen] Ignore private symbols in llvm.used for COFF
2018-01-26 00:15:25 +00:00
coff-weak.ll
…
coldcc64.ll
…
combine-64bit-vec-binop.ll
[X86] Fix typo in test comment. NFC
2018-11-05 01:21:52 +00:00
combine-abs.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
combine-add.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
combine-and.ll
[X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
2018-01-15 22:18:45 +00:00
combine-avx2-intrinsics.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
combine-avx-intrinsics.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
combine-fabs.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
combine-fcopysign.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
combine-lds.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
combine-mul.ll
[X86] Remove sse41 specific code from lowering v16i8 multiply
2018-03-19 17:31:41 +00:00
combine-multiplies.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
combine-or.ll
[X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
2018-01-15 22:18:45 +00:00
combine-pmuldq.ll
[X86][SSE] Add SimplifyDemandedBitsForTargetNode PMULDQ/PMULUDQ handling
2018-10-24 19:11:28 +00:00
combine-rotates.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
combine-sdiv.ll
[DAGCombiner] Fold 0 div/rem X to 0
2018-10-31 14:18:57 +00:00
combine-select.ll
[X86] Fix a potential crash that occur after r333419.
2018-05-29 20:04:10 +00:00
combine-sext-in-reg.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
combine-shl.ll
[SelectionDAG] Add SimplifyDemandedBits to SimplifyDemandedVectorElts simplification
2018-10-06 10:20:04 +00:00
combine-smax.ll
[X86][SSE] Enable SMIN/SMAX/UMIN/UMAX custom lowering for all legal types
2018-02-11 10:52:37 +00:00
combine-smin.ll
[X86][SSE] Enable SMIN/SMAX/UMIN/UMAX custom lowering for all legal types
2018-02-11 10:52:37 +00:00
combine-sra.ll
[DAGCombine] Improve (sra (sra x, c1), c2) -> (sra x, (add c1, c2)) folding
2018-08-17 10:52:49 +00:00
combine-srem.ll
[DAGCombiner] Fold 0 div/rem X to 0
2018-10-31 14:18:57 +00:00
combine-srl.ll
[X86] Add vector shift by immediate to SimplifyDemandedBitsForTargetNode.
2018-11-04 17:31:27 +00:00
combine-sse41-intrinsics.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
combine-sub.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
combine-testm-and.ll
[X86] Add DAG combine to turn (bitcast (and/or/xor (bitcast X), Y)) -> (and/or/xor X, (bitcast Y)) when casting between GPRs and mask operations.
2018-02-04 01:43:48 +00:00
combine-udiv.ll
[X86] Add vector shift by immediate to SimplifyDemandedBitsForTargetNode.
2018-11-04 17:31:27 +00:00
combine-umax.ll
[X86][SSE] Enable SMIN/SMAX/UMIN/UMAX custom lowering for all legal types
2018-02-11 10:52:37 +00:00
combine-umin.ll
[X86][SSE] Enable SMIN/SMAX/UMIN/UMAX custom lowering for all legal types
2018-02-11 10:52:37 +00:00
combine-urem.ll
[DAGCombiner] Fold 0 div/rem X to 0
2018-10-31 14:18:57 +00:00
commute-3dnow.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
commute-blend-avx2.ll
[X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
2018-01-15 22:18:45 +00:00
commute-blend-sse41.ll
[X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
2018-01-15 22:18:45 +00:00
commute-clmul.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
commute-fcmp.ll
[X86] Add a DAG combine to combine (sext (setcc)) with VLX
2018-01-09 18:14:22 +00:00
commute-intrinsic.ll
…
commute-two-addr.ll
…
commute-vpclmulqdq-avx512.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
commute-vpclmulqdq-avx.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
commute-xop.ll
[X86] Mark XOP vpmac* and vpmadc intrinsics as being commutative so that tablegen will generate patterns with the load in operand 0.
2018-02-20 03:58:14 +00:00
commuted-blend-mask.ll
[X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
2018-01-15 22:18:45 +00:00
compact-unwind.ll
…
compare_folding.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
compare-add.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
compare-global.ll
X86: Teach X86InstrInfo::analyzeCompare to recognize compares of symbols.
2017-02-09 21:58:24 +00:00
compare-inf.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
compiler_used.ll
…
complex-asm.ll
…
complex-fastmath.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
complex-fca.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
compress_expand.ll
[X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.
2018-11-09 19:05:51 +00:00
computeKnownBits_urem.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
condbr_if.ll
Recommit r343993: [X86] condition branches folding for three-way conditional codes
2018-10-09 22:03:40 +00:00
condbr_switch.ll
Recommit r343993: [X86] condition branches folding for three-way conditional codes
2018-10-09 22:03:40 +00:00
conditional-indecrement.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
conditional-tailcall-samedest.mir
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
2018-08-11 05:33:00 +00:00
conditional-tailcall.ll
Re-apply r282920 "X86: Allow conditional tail calls in Win64 "leaf" functions (PR26302)"
2017-02-16 19:04:42 +00:00
const-base-addr.ll
…
constant-combines.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
constant-hoisting-and.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
constant-hoisting-bfi.ll
[ConstHoisting] choose to hoist when frequency is the same.
2017-07-06 22:32:27 +00:00
constant-hoisting-cmp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
constant-hoisting-optnone.ll
…
constant-hoisting-shift-immediate.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
constant-pool-remat-0.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
constant-pool-sharing.ll
…
constpool.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
constructor.ll
[COFF] Implement constructor priorities
2017-11-28 08:07:18 +00:00
convert-2-addr-3-addr-inc64.ll
…
copy-eflags.ll
[x86] try to make test immune to better div optimization; NFCI
2018-10-30 20:46:23 +00:00
copy-propagation.ll
MachineCopyPropagation: Do not consider undef operands as clobbers
2017-02-04 02:27:13 +00:00
copysign-constant-magnitude.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cpus-amd-no-x86_64.ll
Further split cpus test
2018-10-26 23:50:23 +00:00
cpus-amd.ll
Split invocations in CodeGen/X86/cpus.ll among multiple tests. (NFC)
2018-09-28 12:08:51 +00:00
cpus-intel-no-x86_64.ll
Further split cpus test
2018-10-26 23:50:23 +00:00
cpus-intel.ll
Split invocations in CodeGen/X86/cpus.ll among multiple tests. (NFC)
2018-09-28 12:08:51 +00:00
cpus-no-x86_64.ll
Further split cpus test
2018-10-26 23:50:23 +00:00
cpus-other.ll
Split invocations in CodeGen/X86/cpus.ll among multiple tests. (NFC)
2018-09-28 12:08:51 +00:00
crash-lre-eliminate-dead-def.ll
…
crash-nosse.ll
…
crash-O0.ll
Revert r345165 "[X86] Bring back the MOV64r0 pseudo instruction"
2018-10-31 21:53:24 +00:00
crash.ll
[CodeGen] Print "%vreg0" as "%0" in both MIR and debug output
2017-11-30 12:12:19 +00:00
critical-anti-dep-breaker.ll
…
critical-edge-split-2.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
cse-add-with-overflow.ll
…
cstring.ll
…
ctor-priority-coff.ll
[COFF] Implement llvm.global_ctors priorities for MSVC COFF targets
2018-09-07 23:07:55 +00:00
ctpop-combine.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
cvt16.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
cvtv2f32.ll
[DAGCombiner] Remove reduceBuildVecConvertToConvertBuildVec and rely on the vectorizers instead (PR35732)
2018-11-02 11:06:18 +00:00
cxx_tlscc64.ll
…
dag-fmf-cse.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
dag-merge-fast-accesses.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
dag-optnone.ll
In dag-optnone.ll, use varargs instead of win64 to fast SDIsel.
2016-07-15 15:30:18 +00:00
dag-rauw-cse.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
dag-update-nodetomatch.ll
[SelectionDAG] Fix for PR30775: Assertion `NodeToMatch->getOpcode() !=
2017-02-03 12:28:40 +00:00
dagcombine-and-setcc.ll
[SelectionDAG] Handle inverted conditions when splitting into multiple branches.
2017-01-24 16:36:07 +00:00
dagcombine-buildvector.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
dagcombine-cse.ll
[X86] SimplifyDemandedVectorEltsForTargetNode - remove identity target shuffles before simplifying inputs
2018-09-29 18:15:26 +00:00
dagcombine-select.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
dagcombine-shifts.ll
…
dagcombine-unsafe-math.ll
[x86] regenerate checks and adjust tests
2018-06-18 20:05:16 +00:00
darwin-bzero.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
darwin-no-dead-strip.ll
…
darwin-preemption.ll
Represent runtime preemption in the IR.
2017-10-26 15:00:26 +00:00
darwin-quote.ll
…
darwin-tls.ll
…
dbg-baseptr.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
dbg-changes-codegen-branch-folding2.mir
MachineOperand/MIParser: Do not print debug-use flag, infer it
2018-10-30 23:28:27 +00:00
dbg-changes-codegen-branch-folding.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
dbg-changes-codegen.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
dbg-combine.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
dbg-line-0-no-discriminator.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
dbg-value-superreg-copy.mir
MachineOperand/MIParser: Do not print debug-use flag, infer it
2018-10-30 23:28:27 +00:00
DbgValueOtherTargets.test
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
debug-loclists.ll
[Codegen] - Implement basic .debug_loclists section emission (DWARF5).
2018-10-26 11:25:12 +00:00
debug-nodebug-crash.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debuginfo-locations-dce.ll
Fix line endings. NFCI.
2018-09-15 14:20:53 +00:00
debugloc-argsize.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debugloc-no-line-0.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
deopt-bundles.ll
[StackMaps] Increase the size of the "location size" field
2017-04-28 04:48:42 +00:00
deopt-intrinsic-cconv.ll
[Debugify] Don't insert debug values after terminating deopts
2018-06-05 00:56:07 +00:00
deopt-intrinsic.ll
[MC] Suppress .Lcfi labels when emitting textual assembly
2017-10-10 00:57:36 +00:00
disable-tail-calls.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
discontiguous-loops.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
div8.ll
…
div-rem-simplify.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
divide-by-constant.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
divide-windows-itanium.ll
CodeGen: use MSVC division on windows itanium
2016-10-13 23:00:11 +00:00
divrem8_ext.ll
Fixes removal of dead elements from PressureDiff (PR37252).
2018-09-26 10:42:41 +00:00
divrem.ll
Fixes removal of dead elements from PressureDiff (PR37252).
2018-09-26 10:42:41 +00:00
dllexport-x86_64.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
dllexport.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
dllimport-x86_64.ll
[X86] Teach fastisel to select calls to dllimport functions
2017-08-05 00:10:43 +00:00
dllimport.ll
[X86] Teach fastisel to select calls to dllimport functions
2017-08-05 00:10:43 +00:00
dollar-name.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
domain-reassignment-implicit-def.ll
[X86DomainReassignment] Don't delete IMPLICIT_DEF nodes
2018-05-18 00:40:52 +00:00
domain-reassignment-test.ll
[X86DomainReassignment] Hopefully fix buildbot failure
2018-05-18 04:36:38 +00:00
domain-reassignment.mir
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
dont-trunc-store-double-to-float.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
dropped_constructor.ll
Don't create a comdat group for a dropped def with initializer
2017-01-18 16:58:43 +00:00
dwarf-comp-dir.ll
[DebugInfo] Support DWARF v5 source code embedding extension
2018-02-23 23:01:06 +00:00
dwarf-eh-prepare.ll
…
dwarf-headers.ll
[DWARFv5] Emit normal type units in .debug_info comdats.
2018-11-09 19:06:09 +00:00
dwarf-split-line-1.ll
CodeGen: Add a dwo output file argument to addPassesToEmitFile and hook it up to dwo output.
2018-05-21 20:16:41 +00:00
dwarf-split-line-2.ll
CodeGen: Add a dwo output file argument to addPassesToEmitFile and hook it up to dwo output.
2018-05-21 20:16:41 +00:00
dyn_alloca_aligned.ll
…
dyn-stackalloc.ll
…
dynamic-alloca-in-entry.ll
…
dynamic-alloca-lifetime.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
dynamic-allocas-VLAs.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
dynamic-regmask.ll
[X86] Add phony registers for high halves of regs with low halves
2018-07-02 19:05:09 +00:00
DynamicCalleeSavedRegisters.ll
[llvm] Remove redundant check-prefix=CHECK from tests. NFC.
2017-07-17 17:32:45 +00:00
early-cfi-sections.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
early-ifcvt-crash.ll
[X86] Make Feature64Bit useful
2018-08-30 06:01:05 +00:00
early-ifcvt.ll
…
eh_frame.ll
…
eh-frame-unreachable.ll
MachO: trap unreachable instructions
2018-04-13 22:25:20 +00:00
eh-label.ll
Emit smaller exception tables for non-SJLJ mode.
2018-02-09 17:13:37 +00:00
eh-nolandingpads.ll
…
eh-null-personality.ll
…
eh-unknown.ll
Emit smaller exception tables for non-SJLJ mode.
2018-02-09 17:13:37 +00:00
eip-addressing-i386.ll
[X86][Assembler] Allow %eip as a register in 32-bit mode for .cfi directives.
2018-09-06 02:03:14 +00:00
element-wise-atomic-memory-intrinsics.ll
Changing constants in a test (NFC)
2018-05-08 19:08:12 +00:00
elf-associated.ll
Ignore !associated metadata with null argument.
2017-05-08 23:46:20 +00:00
elf-comdat2.ll
…
elf-comdat.ll
…
emit-big-cst.ll
…
empty-function.ll
Re-commit r301040 "X86: Don't emit zero-byte functions on Windows"
2017-04-21 21:48:41 +00:00
empty-functions.ll
MachO: trap unreachable instructions
2018-04-13 22:25:20 +00:00
empty-struct-return-type.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
emutls_generic.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
emutls-pic.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
emutls-pie.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
emutls.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
epilogue-cfi-fp.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
epilogue-cfi-no-fp.ll
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00
epilogue.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
equiv_with_fndef.ll
…
equiv_with_vardef.ll
…
evex-to-vex-compress.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
exception-label.ll
…
exedeps-movq.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
exedepsfix-broadcast.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
expand-opaque-const.ll
…
expand-post-ra-pseudo.mir
ExpandPostRAPseudos: Fix alldefsAreDead() not removing operands
2018-10-09 00:07:34 +00:00
expand-vr64-gr64-copy.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
extend-set-cc-uses-dbg.ll
[DAGCombiner] Set the right SDLoc on extended SETCC uses (7/N)
2018-05-11 18:40:10 +00:00
extend.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
extended-fma-contraction.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
extern_weak.ll
…
extmul64.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
extmul128.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
extract-bits.ll
[NFC][x86][AArch64] extract-bits.ll: add test with 'ashr'.
2018-11-05 09:20:08 +00:00
extract-combine.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
extract-concat.ll
[X86] Autogenerate complete checks. NFC
2018-11-06 00:31:27 +00:00
extract-extract.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
extract-insert.ll
[DAGCombiner] reduce insert+bitcast+extract vector ops to truncate (PR39016)
2018-10-21 20:13:29 +00:00
extract-lowbits.ll
[X86] Add extra-uses on the mask of pattern c of extract-{low,}bits.ll tests
2018-10-30 11:12:29 +00:00
extract-store.ll
[X86] Don't use aligned load/store instructions for fp128 if the load/store isn't aligned.
2018-07-02 17:01:54 +00:00
extractelement-from-arg.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
extractelement-index.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
extractelement-legalization-cycle.ll
…
extractelement-legalization-store-ordering.ll
[X86] Remove some InstRWs for plain store instructions on Sandy Bridge.
2018-04-05 20:04:06 +00:00
extractelement-load.ll
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
2018-09-19 18:11:34 +00:00
extractelement-shuffle.ll
…
extractps.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
f16c-intrinsics-fast-isel.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
f16c-intrinsics.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
f16c-schedule.ll
[X86] Fix VZEROUPPER scheduling info on SNB,HSW,BDW,SXL,SKX.
2018-11-09 09:49:06 +00:00
fabs.ll
[SelectionDAG] Removing FABS folding from DAGCombiner
2018-03-30 15:42:52 +00:00
fadd-combines.ll
[DAGCombiner] allow undef elts in vector fadd matching
2018-10-07 16:30:42 +00:00
fast-cc-callee-pops.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-cc-merge-stack-adj.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-cc-pass-in-regs.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-abort-warm.ll
[FastISel] fix a fallback diagnostic.
2017-07-09 05:55:20 +00:00
fast-isel-agg-constant.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-args-fail2.ll
…
fast-isel-args-fail.ll
…
fast-isel-args.ll
…
fast-isel-atomic.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-avoid-unnecessary-pic-base.ll
…
fast-isel-bail.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-bc.ll
[X86][MMX] Improve handling of 64-bit MMX constants
2018-03-01 22:22:31 +00:00
fast-isel-bitcasts-avx512.ll
[AVX-512] Teach fast isel to handle 512-bit vector bitcasts.
2016-12-05 05:50:51 +00:00
fast-isel-bitcasts-avx.ll
…
fast-isel-bitcasts.ll
…
fast-isel-branch_weights.ll
…
fast-isel-call-bool.ll
…
fast-isel-call-cleanup.ll
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
2018-07-23 21:14:35 +00:00
fast-isel-call.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
fast-isel-cmp-branch2.ll
…
fast-isel-cmp-branch3.ll
…
fast-isel-cmp-branch.ll
…
fast-isel-cmp.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
fast-isel-constant.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-constpool.ll
Revert "Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models""
2018-06-28 17:56:43 +00:00
fast-isel-constrain-store-indexreg.ll
…
fast-isel-deadcode.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
fast-isel-divrem-x86-64.ll
…
fast-isel-divrem.ll
…
fast-isel-double-half-convertion.ll
…
fast-isel-emutls.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
fast-isel-expect.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-extract.ll
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00
fast-isel-float-half-convertion.ll
…
fast-isel-fneg.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-fold-mem.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
fast-isel-fptrunc-fpext.ll
[X86] Add more instructions to the memory folding tables using the autogenerated table as a guide.
2018-06-15 05:49:19 +00:00
fast-isel-gc-intrinsics.ll
[FastISel] Move gc intrinsic test to X86 directory
2017-07-04 15:24:08 +00:00
fast-isel-gep.ll
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00
fast-isel-gv.ll
…
fast-isel-i1.ll
…
fast-isel-int-float-conversion-x86-64.ll
[X86][FastISel] Add EVEX support to sitofp handling.
2018-07-13 21:03:43 +00:00
fast-isel-int-float-conversion.ll
[X86][FastISel] Add EVEX support to sitofp handling.
2018-07-13 21:03:43 +00:00
fast-isel-load-i1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fast-isel-mem.ll
…
fast-isel-movsbl-indexreg.ll
…
fast-isel-nontemporal.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
fast-isel-noplt-pic.ll
FastISel: support no-PLT PIC calls on ELF x86_64
2017-12-15 00:32:09 +00:00
fast-isel-ret-ext.ll
…
fast-isel-select-cmov2.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
fast-isel-select-cmov.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
fast-isel-select-cmp.ll
AsmPrinter: mark the beginning and the end of a function in verbose mode
2017-05-23 21:22:16 +00:00
fast-isel-select-pseudo-cmov.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
fast-isel-select-sse.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fast-isel-select.ll
[X86] Regenerate fast-isel tests.
2018-07-30 16:13:40 +00:00
fast-isel-sext-zext.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
fast-isel-sext.ll
…
fast-isel-shift.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
fast-isel-sse12-fptoint.ll
…
fast-isel-stackcheck.ll
…
fast-isel-store.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
fast-isel-tailcall.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-tls.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-trunc-kill-subreg.ll
…
fast-isel-uint-float-conversion-x86-64.ll
[X86][FastISel] Support uitofp with avx512.
2018-07-13 22:09:30 +00:00
fast-isel-uint-float-conversion.ll
[X86][FastISel] Support uitofp with avx512.
2018-07-13 22:09:30 +00:00
fast-isel-vecload.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fast-isel-x32.ll
…
fast-isel-x86-64.ll
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00
fast-isel-x86.ll
[X86] Teach fastisel to select calls to dllimport functions
2017-08-05 00:10:43 +00:00
fast-isel.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fastcall-correct-mangling.ll
Correct PrivateLinkage for COFF
2016-10-13 00:55:24 +00:00
fastcc3struct.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fastcc-2.ll
…
fastcc-byval.ll
…
fastcc-sret.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fastcc.ll
…
fastisel-gep-promote-before-add.ll
…
fastisel-softfloat.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fastmath-float-half-conversion.ll
…
fcmove.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
fdiv-combine.ll
[X86] Regenerate test checks in preparation for a patch. NFC
2018-11-05 19:45:37 +00:00
fdiv.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fentry-insertion.ll
[CodeGen] Remove operands from FENTRY_CALL
2018-10-25 21:12:15 +00:00
field-extract-use-trunc.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fildll.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
file-directive.ll
Make .file directive to have basename only
2017-08-10 18:17:11 +00:00
file-source-filename.ll
CodeGen: Use the source filename as the argument to .file, rather than the module ID.
2017-03-15 16:24:52 +00:00
finite-libcalls.ll
[X86] Properly implement the calling convention for f80 for mingw/x86_64
2018-03-20 06:19:38 +00:00
fixed-stack-di-mir.ll
[MIR] Add support for debug metadata for fixed stack objects
2018-04-25 18:58:06 +00:00
fixup-bw-copy.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
fixup-bw-copy.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
fixup-bw-inst.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fixup-bw-inst.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
fixup-lea.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
flags-copy-lowering.mir
[X86] In EFLAGS copy pass, don't emit EXTRACT_SUBREG instructions since we're after peephole
2018-08-16 21:54:02 +00:00
float-asmprint.ll
…
float-conv-elim.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
floor-soft-float.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fltused_function_pointer.ll
[NFC] fix trivial typos in comments and documents
2018-01-29 05:17:03 +00:00
fltused.ll
[NFC] fix trivial typos in comments and documents
2018-01-29 05:17:03 +00:00
fma4-commute-x86.ll
[X86] Remove FMA4 scalar intrinsics. Use llvm.fma intrinsic instead.
2018-07-06 07:14:41 +00:00
fma4-fneg-combine.ll
[X86] Enhance combineFMA to look for FNEG behind an EXTRACT_VECTOR_ELT.
2018-07-08 18:04:00 +00:00
fma4-intrinsics-x86_64-folded-load.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fma4-intrinsics-x86-upgrade.ll
[X86] Remove the last of the 'x86.fma.' intrinsics and autoupgrade them to 'llvm.fma'. Add upgrade tests for all.
2018-07-05 18:43:58 +00:00
fma4-intrinsics-x86.ll
[X86] Remove the last of the 'x86.fma.' intrinsics and autoupgrade them to 'llvm.fma'. Add upgrade tests for all.
2018-07-05 18:43:58 +00:00
fma4-scalar-memfold.ll
[X86] Remove FMA4 scalar intrinsics. Use llvm.fma intrinsic instead.
2018-07-06 07:14:41 +00:00
fma4-schedule.ll
[X86] Fix VZEROUPPER scheduling info on SNB,HSW,BDW,SXL,SKX.
2018-11-09 09:49:06 +00:00
fma_patterns_wide.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
fma_patterns.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
fma-commute-x86.ll
[X86] Remove X86 specific scalar FMA intrinsics and upgrade to tart independent FMA and extractelement/insertelement.
2018-07-05 06:52:55 +00:00
fma-do-not-commute.ll
[X86] Remove CustomInserter for FMA3 instructions. Looks like since we got full commuting support for FMAs after this was added, the coalescer can now get this right on its own.
2016-07-28 15:28:56 +00:00
fma-fneg-combine.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
fma-intrinsics-canonical.ll
[X86] Lowering FMA intrinsics to native IR (LLVM part)
2018-05-30 15:25:16 +00:00
fma-intrinsics-fast-isel.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
fma-intrinsics-phi-213-to-231.ll
Codegen: Tail-duplicate during placement.
2016-10-11 20:36:43 +00:00
fma-intrinsics-x86-upgrade.ll
[X86] Remove the last of the 'x86.fma.' intrinsics and autoupgrade them to 'llvm.fma'. Add upgrade tests for all.
2018-07-05 18:43:58 +00:00
fma-intrinsics-x86.ll
[X86] Add a missing FMA3 scalar intrinsic pattern.
2018-07-16 23:10:58 +00:00
fma-phi-213-to-231.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fma-scalar-combine.ll
[X86] Rename the operands in the recently introduced MOVSS+FMA patterns so that the operand names in the output pattern are always in 1, 2, 3 order since those are the operand names in the instruction.
2018-05-29 20:46:26 +00:00
fma-scalar-memfold.ll
[X86] Remove X86 specific scalar FMA intrinsics and upgrade to tart independent FMA and extractelement/insertelement.
2018-07-05 06:52:55 +00:00
fma-schedule.ll
[X86] Fix VZEROUPPER scheduling info on SNB,HSW,BDW,SXL,SKX.
2018-11-09 09:49:06 +00:00
fma.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
fmaddsub-combine.ll
[X86] Add support for matching FMSUBADD from build_vector.
2018-03-15 06:14:55 +00:00
fmaxnum.ll
[DAG] propagate FMF for all FPMathOperators
2018-05-15 14:16:24 +00:00
fmf-flags.ll
Utilize new SDNode flag functionality to expand current support for fadd
2018-06-18 23:44:59 +00:00
fmf-propagation.ll
Fast Math Flag mapping into SDNode
2018-05-04 18:48:20 +00:00
fminnum.ll
[DAG] propagate FMF for all FPMathOperators
2018-05-15 14:16:24 +00:00
fmsubadd-combine.ll
[X86] Prefer blendi over movss/sd when avx512 is enabled unless optimizing for size.
2018-07-14 02:05:08 +00:00
fmul-combines.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
fnabs.ll
…
fold-add.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fold-and-shift.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fold-call-2.ll
…
fold-call-3.ll
…
fold-call-oper.ll
…
fold-call.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fold-imm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fold-load-binops.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fold-load-unops.ll
[X86] Lowering sqrt intrinsics to native IR
2018-06-15 18:05:24 +00:00
fold-load-vec.ll
[X86] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector.
2018-10-11 20:36:06 +00:00
fold-load.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fold-mul-lohi.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fold-pcmpeqd-1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fold-pcmpeqd-2.ll
…
fold-push.ll
Mark Knights Landing as having slow two memory operand instructions
2017-08-29 05:14:27 +00:00
fold-rmw-ops.ll
[DAGCOmbine] Ensure that (brcond (setcc ...)) is handled in a canonical manner.
2018-02-23 11:50:42 +00:00
fold-sext-trunc.ll
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00
fold-tied-op.ll
Add LiveRangeShrink pass to shrink live range within BB.
2017-05-31 23:25:25 +00:00
fold-vector-bv-crash.ll
…
fold-vector-sext-crash2.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
fold-vector-sext-crash.ll
[X86] Turn selects with constant condition into vector shuffles during DAG combine
2018-02-17 00:30:30 +00:00
fold-vector-sext-zext.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fold-vector-shl-crash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fold-vector-shuffle-crash.ll
…
fold-vector-trunc-sitofp.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
fold-vex.ll
[X86] Autogenerate checks. NFC
2018-10-15 05:31:24 +00:00
fold-xmm-zero.ll
…
fold-zext-trunc.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
fops-windows-itanium.ll
CodeGen: adjust floating point operations in Windows itanium
2016-10-13 22:38:15 +00:00
force-align-stack-alloca.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
force-align-stack.ll
…
fp2sint.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp128-calling-conv.ll
…
fp128-cast.ll
[x86] regenerate full checks; NFC
2018-10-05 14:56:14 +00:00
fp128-compare.ll
[X86] Regenerate test checks in preparation for a patch. NFC
2018-11-05 19:45:37 +00:00
fp128-extract.ll
[X86] Regenerate fp128 test
2018-01-14 19:07:41 +00:00
fp128-g.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
fp128-i128.ll
[DAGCombiner] Reduce load widths of shifted masks
2018-08-21 10:26:59 +00:00
fp128-libcalls.ll
[legalize-types] Remove stale entries from SoftenedFloats.
2017-03-04 12:00:35 +00:00
fp128-load.ll
[legalize-types] Remove stale entries from SoftenedFloats.
2017-03-04 12:00:35 +00:00
fp128-select.ll
[X86] Don't use aligned load/store instructions for fp128 if the load/store isn't aligned.
2018-07-02 17:01:54 +00:00
fp128-store.ll
…
fp_constant_op.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp_load_cast_fold.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
fp_load_fold.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-arith.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
fp-cvt.ll
Go back to sometimes assuming intristics are local.
2018-03-10 02:42:14 +00:00
fp-double-rounding.ll
…
fp-elim-and-no-fp-elim.ll
…
fp-elim.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-fast.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fp-fold.ll
extend folding fsub/fadd to fneg for FMF
2018-08-09 17:00:03 +00:00
fp-immediate-shorten.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-in-intregs.ll
…
fp-intrinsics.ll
[FPEnv] Support constrained FREM intrinsic
2018-08-20 19:28:56 +00:00
fp-load-trunc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fp-logic-replace.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fp-logic.ll
[DAGCombiner] Expand combining of FP logical ops to sign-setting FP ops
2018-10-09 23:20:11 +00:00
fp-select-cmp-and.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fp-stack-2results.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack-compare-cmov.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack-compare.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack-direct-ret.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack-O0-crash.ll
…
fp-stack-O0.ll
…
fp-stack-ret-conv.ll
…
fp-stack-ret-store.ll
…
fp-stack-ret.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack-retcopy.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack-set-st1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack.ll
…
fp-trunc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fp-undef.ll
[DAG] fold FP binops with undef operands to NaN
2018-05-21 23:54:19 +00:00
fp-une-cmp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fpcmp-soft-fp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fpstack-debuginstr-kill.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
fptosi-constant.ll
[x86] add tests for convert-FP-to-integer with constants; NFC
2018-04-03 18:34:56 +00:00
frame-base.ll
…
frame-lowering-debug-intrinsic-2.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
frame-lowering-debug-intrinsic.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
frame-order.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
frameaddr.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
frameregister.ll
…
frem-msvc32.ll
…
fsgsbase-schedule.ll
[CodeGen] assume max/default throughput for unspecified instructions
2018-06-05 23:34:45 +00:00
fsgsbase.ll
[X86] Regenerate fsgsbase intrinsic tests. NFCI.
2017-12-11 12:22:15 +00:00
fsxor-alignment.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
ftrunc.ll
[VectorLegalizer] Enable TargetLowering::expandFP_TO_UINT support.
2018-10-28 13:07:25 +00:00
full-lsr.ll
Reapply fix PR23384 (part 3 of 3) r304824 (was reverted in r305720).
2017-08-07 19:56:34 +00:00
funclet-layout.ll
…
function-alias.ll
…
function-subtarget-features-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
function-subtarget-features.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
funnel-shift-rot.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
funnel-shift.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
ga-offset2.ll
Use shouldAssumeDSOLocal in isOffsetFoldingLegal.
2016-06-24 18:48:36 +00:00
ga-offset.ll
Use FileCheck. NFC.
2016-06-24 18:04:39 +00:00
gather-addresses.ll
[X86] Move promotion of vector and/or/xor from legalization to DAG combine
2018-10-15 01:51:58 +00:00
gcc_except_table_functions.ll
…
gcc_except_table.ll
…
gep-expanded-vector.ll
Fix bug in DAGBuilder for getelementptr with expanded vector.
2016-08-17 07:52:15 +00:00
getelementptr.ll
[CGP] Fix GEP issue with out of range APInt constant values not fitting in int64_t
2018-08-13 12:10:09 +00:00
gfni-intrinsics.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
ghc-cc64.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
ghc-cc.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
global-access-pie-copyrelocs.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
global-access-pie.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
global-fill.ll
…
global-sections-comdat.ll
…
global-sections-tls.ll
…
global-sections.ll
[MachO] Emit Weak ReadOnlyWithRel to ConstDataSection
2018-04-10 20:16:35 +00:00
gnu-seh-nolpads.ll
[EH] Recognize __(gxx|gcc)_personality_seh0 as the GNU EH personalities
2017-05-31 22:35:52 +00:00
gpr-to-mask.ll
[X86] Don't use EXTRACT_ELEMENT from v1i1 with i8/i32 result type when we need to guarantee zeroes in the upper bits of return.
2018-02-28 08:14:28 +00:00
greedy_regalloc_bad_eviction_sequence.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
gs-fold.ll
…
h-register-addressing-32.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
h-register-addressing-64.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
h-register-store.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
h-registers-0.ll
[X86] Fix Windows i1 zeroext conventions to use i8 instead of i32
2018-03-26 18:49:48 +00:00
h-registers-1.ll
[DAGCombiner] Fix SDLoc in a (zext (zextload x)) combine (4/N)
2018-05-01 19:51:15 +00:00
h-registers-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
h-registers-3.ll
VirtRegMap: Replace some identity copies with KILL instructions.
2016-07-09 00:19:07 +00:00
haddsub-2.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
haddsub-3.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
haddsub-shuf.ll
[x86] add and use fast horizontal vector math subtarget feature
2018-10-12 16:41:02 +00:00
haddsub-undef.ll
[x86] try to form broadcast before widening shuffle elements
2018-11-09 14:54:58 +00:00
haddsub.ll
[x86] add and use fast horizontal vector math subtarget feature
2018-10-12 16:41:02 +00:00
half.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
handle-move.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
hhvm-cc.ll
…
hidden-vis-2.ll
…
hidden-vis-3.ll
Use a got to access a hidden weak undefined on MachO.
2018-01-17 19:19:55 +00:00
hidden-vis-4.ll
…
hidden-vis-pic.ll
CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses
2016-08-24 01:52:46 +00:00
hidden-vis.ll
…
hipe-cc64.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
hipe-cc.ll
[DAG] Improve Aliasing of operations to static alloca
2017-07-18 20:06:24 +00:00
hipe-prologue.ll
[X86] Extract HiPE prologue constants into metadata
2016-06-23 18:17:25 +00:00
hoist-common.ll
…
hoist-invariant-load.ll
[X86] Preserve memory refs when folding loads into divides.
2017-11-08 22:26:39 +00:00
hoist-spill-lpad.ll
…
hoist-spill.ll
Revert r345165 "[X86] Bring back the MOV64r0 pseudo instruction"
2018-10-31 21:53:24 +00:00
horizontal-reduce-smax.ll
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32.
2018-10-09 19:05:50 +00:00
horizontal-reduce-smin.ll
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32.
2018-10-09 19:05:50 +00:00
horizontal-reduce-umax.ll
[X86] Move promotion of vector and/or/xor from legalization to DAG combine
2018-10-15 01:51:58 +00:00
horizontal-reduce-umin.ll
[X86] Move promotion of vector and/or/xor from legalization to DAG combine
2018-10-15 01:51:58 +00:00
horizontal-shuffle.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
huge-stack-offset2.ll
[X86] Emit fewer instructions to allocate >16GB stack frames
2017-03-17 20:25:49 +00:00
huge-stack-offset.ll
…
i1narrowfail.ll
…
i2k.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
i16lshr8pat.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
i64-mem-copy.ll
[x86] auto-generate complete checks; NFC
2018-11-11 14:57:26 +00:00
i64-to-float.ll
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32.
2018-10-09 19:05:50 +00:00
i128-and-beyond.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
i128-immediate.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
i128-mul.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
i128-ret.ll
…
i128-sdiv.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
i256-add.ll
Regenerate test
2018-10-26 12:33:56 +00:00
i386-setjmp-pic.ll
…
i386-shrink-wrapping.ll
[DAGCombine] Improve Load-Store Forwarding
2018-10-10 14:15:52 +00:00
i386-tlscall-fastregalloc.ll
…
i486-fence-loop.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
i686-win-shrink-wrapping.ll
…
iabs.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
icall-branch-funnel.ll
[X86] Enable the MachineVerifier by default
2018-10-29 16:57:43 +00:00
icmp-opt.ll
[DagCombiner] Not all 'andn''s work with immediates.
2018-05-07 21:52:11 +00:00
ident-metadata.ll
…
ifunc-asm.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
illegal-bitfield-loadstore.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
illegal-insert.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
illegal-vector-args-return.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
immediate_merging64.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
immediate_merging.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
implicit-null-check-negative.ll
Fix implicit null check with negative offset
2017-10-17 11:47:36 +00:00
implicit-null-check.ll
Fix implicit null check with negative offset
2017-10-17 11:47:36 +00:00
implicit-null-checks.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
implicit-null-chk-reg-rewrite.mir
[ImplicitNullChecks] Check for rewrite of register used in 'test' instruction
2018-07-04 08:01:26 +00:00
implicit-use-spill.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
imul-lea-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
imul-lea.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
imul.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
inalloca-ctor.ll
…
inalloca-invoke.ll
…
inalloca-regparm.ll
…
inalloca-stdcall.ll
…
inalloca.ll
…
inconsistent_landingpad.ll
…
indirect-branch-tracking.ll
[X86] Enable the MachineVerifier by default
2018-10-29 16:57:43 +00:00
indirect-hidden.ll
…
init-priority.ll
[CodeGen] Switch test as FreeBSD will support .init_array soon.
2016-09-26 22:38:17 +00:00
inline-0bh.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
inline-asm-2addr.ll
…
inline-asm-A-constraint.ll
Allow usage of X86-prefixes as separate instrs.
2018-01-17 10:12:06 +00:00
inline-asm-avx512f-v-constraint.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
inline-asm-avx512vl-v-constraint-32bit.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
inline-asm-avx512vl-v-constraint.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
inline-asm-avx-v-constraint-32bit.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
inline-asm-avx-v-constraint.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
inline-asm-bad-constraint-n.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-bad-modifier.ll
[X86] Don't crash on bad operand modifiers in inline assembly
2018-04-18 05:15:24 +00:00
inline-asm-duplicated-constraint.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-error.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-flag-clobber.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-fpstack.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
inline-asm-h.ll
…
inline-asm-modifier-n.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-modifier-q.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-modifier-V.ll
[X86] Support 'V' register operand modifier
2018-02-08 20:06:05 +00:00
inline-asm-mrv.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-out-regs.ll
…
inline-asm-pic.ll
…
inline-asm-ptr-cast.ll
…
inline-asm-q-regs.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-R-constraint.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-sp-clobber-memcpy.ll
…
inline-asm-stack-realign2.ll
…
inline-asm-stack-realign3.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-stack-realign.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
inline-asm-tied.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
inline-asm-x-scalar.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-sse.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
inlineasm-sched-bug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inreg.ll
[FastISel] Disable local value sinking by default
2018-04-11 16:03:07 +00:00
ins_split_regalloc.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
ins_subreg_coalesce-1.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
ins_subreg_coalesce-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
ins_subreg_coalesce-3.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
insert-into-constant-vector.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
insert-loaded-scalar.ll
[x86] try harder to use broadcast to load a scalar into vector reg
2018-08-25 14:56:05 +00:00
insert-positions.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
insertelement-copytoregs.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
insertelement-duplicates.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
insertelement-legalize.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
insertelement-ones.ll
[X86][AVX] Prefer VPBLENDW+VPBLENDD to VPBLENDVB for v16i16 blend shuffles
2018-08-29 10:51:08 +00:00
insertelement-shuffle.ll
[DAGCombiner] Add a DAG combine to turn a splat build_vector where the splat elemnt is a bitcast from a vector type into a concat_vector
2018-01-18 04:17:06 +00:00
insertelement-var-index.ll
[SelectionDAG][x86] turn insertelement into undef with variable index into splat
2018-08-26 18:20:41 +00:00
insertelement-zero.ll
[X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
2018-01-15 22:18:45 +00:00
insertps-combine.ll
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
2018-09-19 18:11:34 +00:00
insertps-from-constantpool.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
insertps-O0-bug.ll
…
insertps-unfold-load-bug.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
instr-symbols.mir
[x86] Fix test breaking on Darwin after r339962
2018-08-17 14:47:01 +00:00
int-intrinsic.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
intersect-fma-fmf.ll
Guard FMF context by excluding some FP operators from FPMathOperator
2018-09-12 21:09:59 +00:00
interval-update-remat.ll
…
invalid-liveness.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
invalid-shift-immediate.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
invpcid-intrinsic.ll
[x86] invpcid LLVM intrinsic
2018-05-25 06:32:05 +00:00
ipra-inline-asm.ll
[X86] Add phony registers for high halves of regs with low halves
2018-07-02 19:05:09 +00:00
ipra-local-linkage.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
ipra-reg-alias.ll
[X86] Add phony registers for high halves of regs with low halves
2018-03-20 18:46:55 +00:00
ipra-reg-usage.ll
[X86] Add phony registers for high halves of regs with low halves
2018-07-02 19:05:09 +00:00
ipra-transform.ll
…
is-constant.ll
Add support for llvm.is.constant intrinsic (PR4898)
2018-11-07 15:24:12 +00:00
isel-optnone.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
isel-sink2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
isel-sink3.ll
…
isel-sink.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
isint.ll
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
2017-04-26 07:08:44 +00:00
isnan2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
isnan.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
ispositive.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
jump_sign.ll
[X86] Turn X86ISD::AND nodes that have no flag users back into ISD::AND just before isel to enable test instruction matching
2018-02-01 17:08:39 +00:00
known-bits-vector.ll
[DAGCombiner] Call SimplifyDemandedVectorElts from EXTRACT_VECTOR_ELT
2018-07-17 09:45:35 +00:00
known-bits.ll
[X86] Move promotion of vector and/or/xor from legalization to DAG combine
2018-10-15 01:51:58 +00:00
known-signbits-vector.ll
[DAGCombiner][X86][Mips] Enable combineShuffleOfScalars to run between vector op legalization and DAG legalization. Fix bad one use check in combineShuffleOfScalars
2018-11-09 18:04:34 +00:00
kshift.ll
[X86] Add support for turning vXi1 shuffles into KSHIFTL/KSHIFTR.
2018-08-31 17:17:21 +00:00
label-annotation.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
label-redefinition.ll
…
lack-of-signed-truncation-check.ll
[X86] Don't promote i16 compares to i32 if the immediate will fit in 8 bits.
2018-10-05 18:13:36 +00:00
lakemont.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
large-code-model-isel.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
large-constants.ll
…
large-gep-chain.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
large-gep-scale.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
large-global.ll
…
large-pic-string.ll
[ELF] Fix large code model MIR verifier errors
2018-10-24 22:57:28 +00:00
late-address-taken.ll
[ShrinkWrap] Add optimization remarks to the shrink-wrapping pass
2018-06-05 00:27:24 +00:00
late-remat-update.mir
[RegisterCoalescer] Delay live interval update work until the rematerialization
2018-08-06 17:30:45 +00:00
ldzero.ll
…
lea32-schedule.ll
AMD BdVer2 (Piledriver) Initial Scheduler model
2018-10-27 20:46:30 +00:00
lea64-schedule.ll
AMD BdVer2 (Piledriver) Initial Scheduler model
2018-10-27 20:46:30 +00:00
lea-2.ll
…
lea-3.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
lea-4.ll
…
lea-5.ll
…
lea-opt-cse1.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
lea-opt-cse2.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
lea-opt-cse3.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
lea-opt-cse4.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
lea-opt-memop-check-1.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
lea-opt-memop-check-2.ll
…
lea-opt-with-debug.mir
MachineOperand/MIParser: Do not print debug-use flag, infer it
2018-10-30 23:28:27 +00:00
lea-opt.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
lea-recursion.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lea.ll
…
leaf-fp-elim.ll
…
leaFixup32.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
leaFixup64.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
legalize-fmp-oeq-vector-select.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
legalize-libcalls.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
legalize-shift-64.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
legalize-shift.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
legalize-shl-vec.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
legalize-sub-zero-2.ll
…
legalize-sub-zero.ll
…
legalize-types-remapid.ll
[DAG] Don't map a TableId to itself in the ReplacedValues map
2018-06-20 16:06:09 +00:00
legalizedag_vec.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
libcall-sret.ll
[X86] Do not generate __multi3 for mul i128 on X86
2017-10-21 02:26:00 +00:00
licm-dominance.ll
Codegen: LICM Remove check for exactly 1 register def.
2016-06-23 21:38:49 +00:00
licm-nested.ll
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
2018-08-11 05:33:00 +00:00
licm-regpressure.ll
…
licm-symbol.ll
…
limit-split-cost.mir
[RegAlloc] Skip global splitting if the live range is huge and its spill is
2018-07-16 15:42:20 +00:00
limited-prec.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
linux-preemption.ll
Represent runtime preemption in the IR.
2017-10-26 15:00:26 +00:00
lit.local.cfg
…
live-out-reg-info.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
live-range-nosubreg.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
liveness-local-regalloc.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
llc-override-mcpu-mattr.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
llc-print-machineinstrs.mir
[llc] Error out when -print-machineinstrs is used with an unknown pass
2018-10-30 12:07:18 +00:00
load-combine-dbg.ll
Debug Info: Fix the SDLoc propagation for a DAGCombiner rule
2017-10-10 18:08:32 +00:00
load-combine.ll
[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)
2018-05-01 19:26:15 +00:00
load-scalar-as-vector.ll
[x86] add tests for 256- and 512-bit vector types for scalar-to-vector transform; NFC
2018-10-01 16:17:18 +00:00
load-slice.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
loadStore_vectorizer.ll
Reapply "[LSV] Refactoring + supporting bitcasts to a type of different size"
2018-07-20 20:10:04 +00:00
loc-remat.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
local_stack_symbol_ordering.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
localescape.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
log2_not_readnone.ll
…
logical-load-fold.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
long-setcc.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
longlong-deadload.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
loop-blocks.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
loop-hoist.ll
…
loop-search.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
loop-strength-reduce2.ll
…
loop-strength-reduce4.ll
Reapply fix PR23384 (part 3 of 3) r304824 (was reverted in r305720).
2017-08-07 19:56:34 +00:00
loop-strength-reduce5.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
loop-strength-reduce6.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
loop-strength-reduce7.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
loop-strength-reduce8.ll
…
loop-strength-reduce-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
loop-strength-reduce-3.ll
…
loop-strength-reduce-crash.ll
[LSR] Tweak loop-strength-reduce-crash test. Test-only change.
2016-11-10 22:37:13 +00:00
loop-strength-reduce.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lower-bitcast.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
lower-vec-shift-2.ll
[X86][SSE] Avoid vector extraction/insertion for non-constant uniform shifts
2018-08-28 10:14:09 +00:00
lower-vec-shift.ll
[SelectionDAG] Add FoldBUILD_VECTOR to simplify new BUILD_VECTOR nodes
2018-10-30 10:32:11 +00:00
lower-vec-shuffle-bug.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
lrshrink.ll
Add LiveRangeShrink pass to shrink live range within BB.
2017-05-31 23:25:25 +00:00
lsr-crash-empty-uses.ll
Add a CHECK line for r337072.
2018-07-13 23:48:59 +00:00
lsr-delayed-fold.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lsr-i386.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lsr-interesting-step.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lsr-loop-exit-cond.ll
[SchedModel] Fix for read advance cycles with implicit pseudo operands.
2018-10-30 15:04:40 +00:00
lsr-negative-stride.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lsr-nonaffine.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lsr-normalization.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
lsr-overflow.ll
…
lsr-quadratic-expand.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lsr-redundant-addressing.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lsr-reuse-trunc.ll
…
lsr-reuse.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lsr-sort.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lsr-static-addr.ll
[X86][Atom] Convert Atom scheduler model to SchedRW (PR32431)
2018-04-11 18:23:01 +00:00
lsr-wrap.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lwp-intrinsics-x86_64.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
lwp-intrinsics.ll
AMD BdVer2 (Piledriver) Initial Scheduler model
2018-10-27 20:46:30 +00:00
lwp-schedule.ll
AMD BdVer2 (Piledriver) Initial Scheduler model
2018-10-27 20:46:30 +00:00
lzcnt-schedule.ll
AMD BdVer2 (Piledriver) Initial Scheduler model
2018-10-27 20:46:30 +00:00
lzcnt-tzcnt.ll
[X86] Auto-generate checks. NFC
2018-02-06 18:18:49 +00:00
lzcnt-zext-cmp.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
lzcnt.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
machine-combiner-int-vec.ll
[MachineCombiner] Add check for optimal pattern order.
2018-01-31 13:54:30 +00:00
machine-combiner-int.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
machine-combiner.ll
[MachineCombiner] Add check for optimal pattern order.
2018-01-31 13:54:30 +00:00
machine-copy-prop.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
machine-cp-debug.mir
MachineOperand/MIParser: Do not print debug-use flag, infer it
2018-10-30 23:28:27 +00:00
machine-cp.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
machine-cse.ll
Revert r345165 "[X86] Bring back the MOV64r0 pseudo instruction"
2018-10-31 21:53:24 +00:00
machine-outliner-debuginfo.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
machine-outliner-disubprogram.ll
[MachineOutliner] Check the last instruction from the sequence when updating liveness
2018-07-14 09:40:01 +00:00
machine-outliner-noredzone.ll
[MachineOutliner] Test for X86FI->getUsesRedZone() as well as Attribute::NoRedZone
2018-04-03 23:32:41 +00:00
machine-outliner-tailcalls.ll
[MachineOutliner][X86] Use TAILJMPd64 instead of JMP_1 for TailCall construction
2018-07-30 09:59:33 +00:00
machine-outliner.ll
[MachineOutliner][NFC] Make outlined functions have internal linkage
2018-04-03 21:36:00 +00:00
machine-region-info.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
machine-sink-and-implicit-null-checks.ll
…
machine-sink.ll
Using branch probability to guide critical edge splitting.
2016-10-20 18:06:52 +00:00
machine-trace-metrics-crash.ll
[X86] Regenerate test checks in preparation for a patch. NFC
2018-11-05 19:45:37 +00:00
MachineBranchProb.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
MachineSink-CritEdge.ll
…
MachineSink-DbgValue.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
MachineSink-eflags.ll
[X86] Regenerate test checks in preparation for a patch. NFC
2018-11-05 19:45:37 +00:00
machinesink-merge-debuginfo.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
machinesink-null-debuginfo.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
MachineSink-PHIUse.ll
…
MachineSink-SubReg.ll
Recommit 'Remove the restriction that MachineSinking is now stopped by
2016-08-12 03:33:22 +00:00
macho-comdat.ll
…
macho-trap.ll
MachO: trap unreachable instructions
2018-04-13 22:25:20 +00:00
madd.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
mangle-question-mark.ll
[IR] Avoid the need to prefix MS C++ symbols with '\01'
2018-03-16 20:13:32 +00:00
mask-negated-bool.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
masked_gather_scatter_widen.ll
[ScalarizeMaskedMemIntrin] Don't emit 'icmp eq i1 %x, 1' to check mask values. That's just %x so use that directly.
2018-09-27 18:01:48 +00:00
masked_gather_scatter.ll
[X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.
2018-11-09 19:05:51 +00:00
masked_memop.ll
[X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.
2018-11-09 19:05:51 +00:00
masked-iv-safe.ll
Reapply fix PR23384 (part 3 of 3) r304824 (was reverted in r305720).
2017-08-07 19:56:34 +00:00
masked-iv-unsafe.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
maskmovdqu.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
materialize.ll
VirtRegMap: Replace some identity copies with KILL instructions.
2016-07-09 00:19:07 +00:00
mature-mc-support.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mbp-false-cfg-break.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mcinst-avx-lowering.ll
…
mcinst-lowering.ll
Recommit r274692 - [X86] Transform setcc + movzbl into xorl + setcc
2016-07-07 22:50:23 +00:00
mcu-abi.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
mem-intrin-base-reg.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
mem-promote-integers.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
membarrier.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
memcmp-mergeexpand.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
memcmp-minsize.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
memcmp-optsize.ll
[x86, MemCmpExpansion] allow 2 pairs of loads per block (PR33325)
2018-01-06 16:16:04 +00:00
memcmp.ll
[x86, MemCmpExpansion] allow 2 pairs of loads per block (PR33325)
2018-01-06 16:16:04 +00:00
memcpy-2.ll
[X86] Remove some InstRWs for plain store instructions on Sandy Bridge.
2018-04-05 20:04:06 +00:00
memcpy-from-string.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memcpy-struct-by-value.ll
add skylake
2017-04-21 09:21:01 +00:00
memcpy.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
mempcpy-32.ll
[TLI] Robustize SDAG LibFunc proto checking by merging it into TLI.
2017-02-03 19:11:19 +00:00
mempcpy.ll
[TLI] Robustize SDAG LibFunc proto checking by merging it into TLI.
2017-02-03 19:11:19 +00:00
memset64-on-x86-32.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memset-2.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memset-3.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memset-nonzero.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
memset-sse-stack-realignment.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memset.ll
[SchedModel] Fix for read advance cycles with implicit pseudo operands.
2018-10-30 15:04:40 +00:00
merge_store_duplicated_loads.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
merge_store.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
merge-consecutive-loads-128.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
merge-consecutive-loads-256.ll
[X86] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector.
2018-10-11 20:36:06 +00:00
merge-consecutive-loads-512.ll
[X86] Fix some isel patterns that used aligned vector load instructions with unaligned predicates.
2018-03-08 00:21:17 +00:00
merge-consecutive-stores-i1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
merge-consecutive-stores.ll
[DAG, X86] Revert r327197 "Revert r327170, r327171, r327172"
2018-03-19 20:19:46 +00:00
merge-sp-update-lea.ll
Update tests to use at least darwin9.
2016-06-29 14:51:10 +00:00
merge-sp-updates-cfi.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
merge-store-constants.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
merge-store-partially-alias-loads.ll
[CodeGen] Use MIR syntax for MachineMemOperand printing
2018-03-14 21:52:13 +00:00
merge-vector-stores-scale-idx-crash.ll
Revert "Revert r342183 "[DAGCombine] Fix crash when store merging created an extract_subvector with invalid index.""
2018-09-17 14:40:13 +00:00
MergeConsecutiveStores.ll
[CodeGen][NFC] Add tests for heterogeneous types in MergeConsecutiveStores
2018-10-01 07:16:22 +00:00
mfence.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
min-legal-vector-width.ll
[DAGCombiner] narrow vector binops when extraction is cheap
2018-10-30 14:14:34 +00:00
mingw-alloca.ll
…
mingw-comdats-xdata.ll
[COFF] Fix assembly output of comdat sections without an attached symbol
2018-07-23 22:15:19 +00:00
mingw-comdats.ll
[X86] Fix 32-bit mingw comdat names, only add one underscore
2018-06-21 23:06:33 +00:00
mingw-refptr.ll
[MinGW] [X86] Add stubs for references to data variables that might end up imported from a dll
2018-08-29 17:28:34 +00:00
misaligned-memset.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
misched-aa-colored.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
misched-aa-mmos.ll
…
misched-balance.ll
…
misched-code-difference-with-debug.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
misched-copy.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
misched-crash.ll
…
misched-fusion.ll
[X86] Apply SlowIncDec feature to Sandybridge/Ivybridge CPUs as well
2017-08-30 05:00:35 +00:00
misched-ilp.ll
…
misched-matmul.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
misched-matrix.ll
[X86] Remove some InstRWs for plain store instructions on Sandy Bridge.
2018-04-05 20:04:06 +00:00
misched-new.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
mmx-arg-passing-x86-64.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
mmx-arg-passing.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
mmx-arith.ll
[X86] Custom type legalize v2i8/v2i16/v2i32 mul to use to pmuludq.
2018-11-05 05:02:12 +00:00
mmx-bitcast-fold.ll
…
mmx-bitcast.ll
[X86] Stop printing moves between VR64 and GR64 with 'movd' mnemonic. Use 'movq' instead.
2018-01-05 20:55:12 +00:00
mmx-build-vector.ll
[X86] Remove some composite MOVSS/MOVSD isel patterns.
2018-07-11 04:51:40 +00:00
mmx-coalescing.ll
[DAGCombiner] reduce insert+bitcast+extract vector ops to truncate (PR39016)
2018-10-21 20:13:29 +00:00
mmx-copy-gprs.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mmx-cvt.ll
[X86] Stop printing moves between VR64 and GR64 with 'movd' mnemonic. Use 'movq' instead.
2018-01-05 20:55:12 +00:00
mmx-fold-load.ll
[X86][MMX] Improve MMX constant generation
2018-01-16 14:21:28 +00:00
mmx-fold-zero.ll
[X86][MMX] Add support for MMX zero vector creation
2018-01-15 22:32:40 +00:00
mmx-intrinsics.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mmx-only.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mmx-schedule.ll
[X86][BdVer2] Fix loads/stores throughput for Piledriver (PR39465)
2018-11-10 14:31:43 +00:00
mod128.ll
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
2017-04-26 07:08:44 +00:00
movbe-schedule.ll
[X86][SandyBridge] SBWriteResPair +5cy Memory Folds
2018-04-06 11:00:51 +00:00
movbe.ll
…
movdir-intrinsic-x86_64.ll
[X86] movdiri and movdir64b instructions
2018-05-01 10:01:16 +00:00
movdir-intrinsic-x86.ll
[X86] movdiri and movdir64b instructions
2018-05-01 10:01:16 +00:00
movfs.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
movgs.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
movmsk-cmp.ll
[X86] Stop promoting vector and/or/xor/andn to vXi64.
2018-10-26 17:21:26 +00:00
movmsk.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
movntdq-no-avx.ll
…
movpc32-check.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
movtopush64.ll
X86CallFrameOptimization: Recognize 'store 0/-1 using and/or' idioms
2017-10-24 12:13:05 +00:00
movtopush.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
movtopush.mir
[MIR] Add support for debug metadata for fixed stack objects
2018-04-25 18:58:06 +00:00
ms-inline-asm-avx512.ll
[ms-inline-asm] Use the frontend size only for ambiguous instructions
2017-05-04 18:19:52 +00:00
ms-inline-asm-redundant-clobber.ll
[MachineInstr] In addRegisterKilled and addRegisterDead, don't remove operands from inline assembly instructions if they have an associated flag operand.
2018-09-13 20:51:27 +00:00
ms-inline-asm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mul64.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
mul128_sext_loop.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mul128.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
mul-constant-i16.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
mul-constant-i32.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
mul-constant-i64.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
mul-constant-result.ll
[X86] Change multiply by 26 to use two multiplies by 5 and an add instead of multiply by 3 and 9 and a subtract.
2018-07-24 23:44:12 +00:00
mul-i256.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
mul-i512.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
mul-i1024.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
mul-legalize.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mul-remat.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mul-shift-reassoc.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
muloti.ll
[SelectionDAG] Improve the legalisation lowering of UMULO.
2018-08-16 18:39:39 +00:00
mult-alt-generic-i686.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mult-alt-generic-x86_64.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mult-alt-x86.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
multiple-loop-post-inc.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
multiple-return-values-cross-block.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mulvi32.ll
[X86] Custom type legalize v2i8/v2i16/v2i32 mul to use to pmuludq.
2018-11-05 05:02:12 +00:00
mulx32.ll
[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)
2018-05-01 19:26:15 +00:00
mulx64.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
musttail-fastcall.ll
…
musttail-indirect.ll
[X86] Add *SP to tailcall register class to fix verifier error
2018-10-24 21:09:34 +00:00
musttail-thiscall.ll
[X86] Add *SP to tailcall register class to fix verifier error
2018-10-24 21:09:34 +00:00
musttail-varargs.ll
[X86] Add *SP to tailcall register class to fix verifier error
2018-10-24 21:09:34 +00:00
musttail.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mwaitx-schedule.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
mwaitx.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
named-reg-alloc.ll
…
named-reg-notareg.ll
…
nancvt.ll
…
narrow_op-1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
narrow-shl-cst.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
narrow-shl-load.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
neg_cmp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
neg_fp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
neg-shl-add.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
negate-add-zero.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
negate-i1.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
negate-shift.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
negate.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
negative_zero.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
negative-offset.ll
…
negative-sin.ll
Go back to sometimes assuming intristics are local.
2018-03-10 02:42:14 +00:00
negative-stride-fptosi-user.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
negative-subscript.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
new-remat.ll
…
newline-and-quote.ll
…
no-and8ri8.ll
[X86] Do not use AND8ri8 in AVX512 pattern
2016-07-21 22:24:08 +00:00
no-cmov.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
no-plt-libcalls.ll
Simplification of libcall like printf->puts must check for RtLibUseGOT metadata.
2018-04-10 23:32:36 +00:00
no-plt.ll
GOTPCREL references must always use RIP.
2018-04-10 22:50:05 +00:00
no-prolog-kill.ll
X86FrameLowering: Check subregs when deciding prolog kill flags
2016-06-28 20:31:56 +00:00
no-sse2-avg.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
no-stack-arg-probe.ll
Support for the mno-stack-arg-probe flag
2018-02-23 13:46:25 +00:00
nobt.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
nocf_check.ll
[X86][CET] Changing -fcf-protection behavior to comply with gcc (LLVM part)
2018-05-18 11:58:25 +00:00
nocx16.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
non-lazy-bind.ll
…
non-unique-sections.ll
…
non-value-mem-operand.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
nonconst-static-ev.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
nonconst-static-iv.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
nontemporal-2.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
nontemporal-loads.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
nontemporal.ll
[DAG, X86] Revert r327197 "Revert r327170, r327171, r327172"
2018-03-19 20:19:46 +00:00
noreturn-call.ll
…
norex-subreg.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
nosse-error1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
nosse-error2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
nosse-varargs.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
nosse-vector.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
not-and-simplify.ll
[SelectionDAG] allow vector types with isBitwiseNot()
2018-09-19 21:48:30 +00:00
note-cet-property.ll
[X86][ELF][CET] Adding the .note.gnu.property ELF section in X86
2018-06-04 21:07:35 +00:00
note-sections.ll
Mark ELF sections whose name start with .note as note
2016-09-20 20:21:13 +00:00
null-streamer.ll
Canonicalize the representation of empty an expression in DIGlobalVariableExpression
2017-08-30 18:06:51 +00:00
O0-pipeline.ll
[X86] Fix pipeline tests when enabling MIR verification, NFC
2018-10-24 23:52:22 +00:00
O3-pipeline.ll
[X86] Fix pipeline tests when enabling MIR verification, NFC
2018-10-24 23:52:22 +00:00
objc-gc-module-flags.ll
…
object-size.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
oddshuffles.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
opaque-constant-asm.ll
…
opt_phis.mir
MachineOperand/MIParser: Do not print debug-use flag, infer it
2018-10-30 23:28:27 +00:00
opt-ext-uses.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
opt-shuff-tstore.ll
…
optimize-max-0.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
optimize-max-1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
optimize-max-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
optimize-max-3.ll
…
or-address.ll
…
or-branch.ll
[DAGCOmbine] Ensure that (brcond (setcc ...)) is handled in a canonical manner.
2018-02-23 11:50:42 +00:00
or-lea.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
osx-private-labels.ll
…
overflow-intrinsic-setcc-fold.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
overflow.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
overlap-shift.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
packed_struct.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
packss.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
paddus.ll
[X86] Move promotion of vector and/or/xor from legalization to DAG combine
2018-10-15 01:51:58 +00:00
palignr.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
parity.ll
[X86] Add a DAG combine for the __builtin_parity idiom used by clang to enable better codegen
2018-08-03 18:00:29 +00:00
partial-fold32.ll
[X86] Allow folding of stack reloads when loading a subreg of the spilled reg
2016-11-23 18:33:49 +00:00
partial-fold64.ll
[X86] Allow folding of stack reloads when loading a subreg of the spilled reg
2016-11-23 18:33:49 +00:00
pass-three.ll
…
patchable-prologue.ll
[CodeGen] Remove out operands from PATCHABLE_OP
2018-10-26 13:37:25 +00:00
patchpoint-invoke.ll
Emit smaller exception tables for non-SJLJ mode.
2018-02-09 17:13:37 +00:00
patchpoint-verifiable.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
patchpoint-webkit_jscc.ll
[MC] Suppress .Lcfi labels when emitting textual assembly
2017-10-10 00:57:36 +00:00
patchpoint.ll
[CodeGen] fix argument attribute in lowering statepoint/patchpoint
2018-03-01 13:31:57 +00:00
pause.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
peep-setb.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
peep-test-0.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
peep-test-1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
peep-test-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
peep-test-3.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
peep-test-4.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
peephole-cvt-sse.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
peephole-fold-movsd.ll
…
peephole-multiple-folds.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
peephole-na-phys-copy-folding.ll
[x86] Switch EFLAGS copy lowering to use reg-reg form of testing for
2018-04-18 15:52:50 +00:00
peephole-recurrence.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
peephole.mir
MIR: Print the register class or bank in vreg defs
2017-10-24 18:04:54 +00:00
personality_size.ll
…
personality.ll
…
phaddsub.ll
[x86] add and use fast horizontal vector math subtarget feature
2018-10-12 16:41:02 +00:00
phi-bit-propagation.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
phi-immediate-factoring.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
phielim-split.ll
…
phys_subreg_coalesce-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
phys_subreg_coalesce-3.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
phys_subreg_coalesce.ll
…
phys-reg-local-regalloc.ll
[SchedModel] Fix for read advance cycles with implicit pseudo operands.
2018-10-30 15:04:40 +00:00
physreg-pairs-error.ll
[X86] Fix register resizings for inline assembly register operands.
2018-09-13 20:33:56 +00:00
physreg-pairs.ll
[X86] Fix register resizings for inline assembly register operands.
2018-09-13 20:33:56 +00:00
pic_jumptable.ll
…
pic-load-remat.ll
…
pic.ll
…
pie.ll
…
pku.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
pmaddubsw.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
pmovext.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pmovsx-inreg.ll
[DAGCombiner] Change the SDLoc on split extloads (2/N)
2018-05-01 19:29:15 +00:00
pmul.ll
[X86] Move the promotion of v16i16->v16i8 for avx512f but not avx512bw from lowering to isel. Change to use vpmovzx instead of vpmovsx.
2018-11-09 20:09:53 +00:00
pmulh.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
pmulld.ll
…
pointer-vector.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pop-stack-cleanup-msvc.ll
[X86] Don't clobber reserved registers with stack adjustments
2017-11-07 08:50:21 +00:00
pop-stack-cleanup.ll
…
popcnt-schedule.ll
AMD BdVer2 (Piledriver) Initial Scheduler model
2018-10-27 20:46:30 +00:00
popcnt.ll
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
2018-04-24 22:35:27 +00:00
post-ra-sched-with-debug.mir
MachineOperand/MIParser: Do not print debug-use flag, infer it
2018-10-30 23:28:27 +00:00
post-ra-sched.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
postalloc-coalescing.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
postra-ignore-dbg-instrs.mir
MachineOperand/MIParser: Do not print debug-use flag, infer it
2018-10-30 23:28:27 +00:00
postra-licm.ll
…
pow.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
powi.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
pr1462.ll
…
pr1489.ll
…
pr1505.ll
…
pr1505b.ll
…
pr2177.ll
…
pr2182.ll
…
pr2326.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr2585.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr2656.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
pr2659.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr2849.ll
…
pr2924.ll
…
pr2982.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr3154.ll
…
pr3216.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr3241.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr3243.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr3244.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr3250.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr3317.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr3366.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr3457.ll
…
pr3522.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr5145.ll
[X86] Regenerate test checks in preparation for a patch. NFC
2018-11-05 19:45:37 +00:00
pr7882.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr9127.ll
…
pr9517.ll
Add inline asm aliasing test.
2018-07-23 20:19:10 +00:00
pr9743.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
pr10068.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr10475.ll
…
pr10499.ll
…
pr10523.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr10524.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr10525.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr10526.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr11202.ll
Codegen: Tail-duplicate during placement.
2016-10-11 20:36:43 +00:00
pr11334.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
pr11415.ll
…
pr11468.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr11985.ll
[X86] Make Feature64Bit useful
2018-08-30 06:01:05 +00:00
pr11998.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr12360.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
pr12889.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr13209.ll
…
pr13220.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr13458.ll
…
pr13577.ll
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
2018-09-19 18:11:34 +00:00
pr13859.ll
…
pr13899.ll
…
pr14088.ll
[X86] Regenerate PR14088 test. NFCI.
2018-07-07 20:08:27 +00:00
pr14098.ll
…
pr14161.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr14204.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr14314.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr14333.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
pr14562.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr15267.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr15296.ll
…
pr15309.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr15705.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
pr15981.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
pr16031.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr16360.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr16807.ll
…
pr17546.ll
…
pr17631.ll
…
pr17764.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr18014.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr18054.ll
…
pr18162.ll
…
pr18344.ll
[X86][SSE] Don't colaesce v4i32 extracts
2018-01-26 17:11:34 +00:00
pr18846.ll
…
pr19049.ll
…
pr20011.ll
[SelectionDAG] Fix codegen of vector stores with non byte-sized elements.
2018-01-20 16:05:10 +00:00
pr20012.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr20020.ll
…
pr20088.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr21099.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr21792.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
pr22019.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
pr22103.ll
…
pr22338.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr22774.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
pr22970.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
pr23103.ll
Revert "Regenerate expected test results for test/CodeGen/X86/pr23103.ll . NFC"
2018-06-04 21:49:23 +00:00
pr23246.ll
[X86] Make all instructions that operate on MMX types, but were added after the initial MMX support via one of the SSE features flags make them require the MMX feature as well.
2018-06-05 06:20:06 +00:00
pr23273.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr23603.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr23664.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
pr24139.ll
…
pr24374.ll
Win64: Don't emit unwind info for "leaf" functions (PR30337)
2016-09-22 19:50:05 +00:00
pr24602.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr25828.ll
…
pr26350.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr26625.ll
…
pr26652.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr26757.ll
…
pr26835.ll
…
pr26870.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
pr27071.ll
MCStreamer: Use "cfi" for CFI related temp labels.
2016-11-30 23:48:26 +00:00
pr27501.ll
…
pr27591.ll
[DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors.
2018-03-01 22:32:25 +00:00
pr27681.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
pr28129.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr28173.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
pr28444.ll
Reapply r274829 with fix for FP vectors
2016-07-08 21:25:33 +00:00
pr28472.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr28489.ll
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00
pr28504.ll
[DAGCombine] Make sext(setcc) combine respect getBooleanContents
2016-08-01 19:39:49 +00:00
pr28515.ll
[DAG] Correctly chain masked loads
2016-07-13 23:23:40 +00:00
pr28560.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
pr28824.ll
Make TwoAddressInstructionPass::rescheduleMIBelowKill subreg-aware
2016-08-11 17:38:33 +00:00
pr29010.ll
[NFC] fix trivial typos in comments
2018-04-13 11:37:06 +00:00
pr29022.ll
[X86] Optimization for replacing LEA with MOV at frame index elimination time
2016-09-26 06:42:07 +00:00
pr29061.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
pr29112.ll
[X86][SSE] Combine (some) target shuffles with multiple uses
2018-08-09 12:30:02 +00:00
pr29170.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr29222.ll
[X86][MMX] Support MMX build vectors to avoid SSE usage (PR29222)
2018-03-11 19:22:13 +00:00
pr30284.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr30290.ll
[X86] Mark all byval parameters as aliased
2018-05-08 09:18:01 +00:00
pr30430.ll
RegAllocFast: Leave unassigned virtreg entries in map
2018-11-07 06:57:03 +00:00
pr30511.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr30562.ll
Test commit.
2017-05-15 13:14:04 +00:00
pr30813.ll
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00
pr30821.mir
Word wrap a test-file comment to 80 columns
2018-05-04 08:58:06 +00:00
pr31045.ll
[X86] Remove some InstRWs for plain store instructions on Sandy Bridge.
2018-04-05 20:04:06 +00:00
pr31088.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr31143.ll
[X86] Fix non-intrinsic roundss/roundsd to not read the destination register
2016-12-05 20:57:37 +00:00
pr31242.ll
[X86] Skip over DEBUG_VALUE while looking for start of call sequence
2016-12-07 19:31:08 +00:00
pr31271.ll
[X86] Do not assume "ri" instructions always have an immediate operand
2016-12-07 19:29:18 +00:00
pr31323.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr31593.ll
Added a testcase for PR31593. A patch (r291535) that fixed this bug didn't have a testcase.
2018-05-24 08:45:15 +00:00
pr31773.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr31956.ll
[X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
2018-01-15 22:18:45 +00:00
pr32108.ll
[DAGCombine] Improve Load-Store Forwarding
2018-10-10 14:15:52 +00:00
pr32241.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
pr32256.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
pr32278.ll
Second attempt for fix Hexagon buildbot by moving test to under X86/
2017-03-15 21:13:45 +00:00
pr32282.ll
[x86] try to make test immune to better div optimization; NFCI
2018-10-30 20:42:03 +00:00
pr32284.ll
RegAllocFast: Leave unassigned virtreg entries in map
2018-11-07 06:57:03 +00:00
pr32329.ll
Revert 336426 (and follow-ups 428, 440), it very likely caused PR38084.
2018-07-06 17:37:24 +00:00
pr32340.ll
Revert r345165 "[X86] Bring back the MOV64r0 pseudo instruction"
2018-10-31 21:53:24 +00:00
pr32345.ll
RegAllocFast: Leave unassigned virtreg entries in map
2018-11-07 06:57:03 +00:00
pr32368.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr32420.ll
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
2018-04-24 22:35:27 +00:00
pr32451.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
pr32484.ll
[FastISel] Disable local value sinking by default
2018-04-11 16:03:07 +00:00
pr32515.ll
[DAG] Avoid deleting nodes before combining them.
2017-07-18 17:39:15 +00:00
pr32588.ll
[X86] Create the correct ADC/SBB SDNode when lowering add.
2017-04-11 19:11:20 +00:00
pr32610.ll
[ScheduleDAG] Deal with already scheduled loads in ScheduleDAG.
2017-05-31 18:43:17 +00:00
pr32659.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr32907.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr33290.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr33349.ll
[X86] Lower extract_element from k-registers by bitcasting from v16i1 to i16 and extending/truncating.
2018-02-28 22:23:55 +00:00
pr33396.ll
[SelectionDAG] Update Loop info after splitting critical edges.
2017-06-17 00:56:27 +00:00
pr33715.ll
[X86] Relax an assertion when legalizing vector types.
2017-07-09 19:22:48 +00:00
pr33747.ll
[X86] Add PR33747 test case
2018-02-11 13:12:50 +00:00
pr33772.ll
[x86] Add a missing triple, without which the CPU won't parse.
2017-07-18 08:16:32 +00:00
pr33828.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr33844.ll
[x86] shrink 'and' immediate values by setting the high bits (PR35907)
2018-01-19 16:37:25 +00:00
pr33954.ll
[X86] Improved X86::CMOV to Branch heuristic.
2017-08-08 12:17:56 +00:00
pr33960.ll
[DAG] make binops with undef operands consistent with IR
2018-02-12 21:37:27 +00:00
pr34080-2.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
pr34080.ll
[X86] Make Feature64Bit useful
2018-08-30 06:01:05 +00:00
pr34088.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
pr34137.ll
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
2018-04-24 22:35:27 +00:00
pr34139.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr34149.ll
[DAG] propagate FMF for all FPMathOperators
2018-05-15 14:16:24 +00:00
pr34177.ll
Remove various use of undef in the X86 test suite as patern involving undef can collapse them. NFC
2018-06-04 22:09:26 +00:00
pr34271-1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr34271.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr34381.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr34397.ll
[X86] Add RUN line for LIT test committed in "rL312438: [X86] Fix crash on assert of non-simple type after type-legalization.".
2017-09-03 10:44:18 +00:00
pr34421.ll
MachO: trap unreachable instructions
2018-04-13 22:25:20 +00:00
pr34592.ll
RegAllocFast: Leave unassigned virtreg entries in map
2018-11-07 06:57:03 +00:00
pr34605.ll
[X86] Use DAG.getConstant instead of getZeroVector.
2018-11-11 07:24:36 +00:00
pr34629.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr34634.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr34653.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
pr34657.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
pr34855.ll
[DAGCombiner] Support folding (mulhs/u X, 0)->0 for vectors.
2017-12-11 08:33:20 +00:00
pr35272.ll
[X86] Use vptestm/vptestnm for comparisons with zero to avoid creating a zero vector.
2018-01-27 20:19:09 +00:00
pr35316.ll
[X86] Rename function main->foo in CodeGen/X86/pr35316.ll. NFC
2018-02-13 10:58:19 +00:00
pr35399.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr35443.ll
[X86][AVX2] Enable ZERO_EXTEND_VECTOR_INREG lowering of 256-bit vectors
2018-10-08 18:40:50 +00:00
pr35636.ll
[X86] Add haswell testing for PR35635 as well.
2018-03-14 21:03:09 +00:00
pr35761.ll
[DAGCombine] Fix for PR35761
2018-01-08 13:21:24 +00:00
pr35763.ll
[DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors.
2018-03-01 22:32:25 +00:00
pr35765.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
pr35918.ll
[X86] Add vector shift by immediate to SimplifyDemandedBitsForTargetNode.
2018-11-04 17:31:27 +00:00
pr35972.ll
[X86] When legalizing (v64i1 select i8, v64i1, v64i1) make sure not to introduce bitcasts to i64 in 32-bit mode
2018-01-17 18:46:01 +00:00
pr35982.ll
[X86][MMX] Add PR35982 test cases
2018-01-17 22:19:31 +00:00
pr36199.ll
[x86] preserve test intent by removing undef
2018-05-16 17:57:35 +00:00
pr36274.ll
[DAG, X86] Revert r327197 "Revert r327170, r327171, r327172"
2018-03-19 20:19:46 +00:00
pr36312.ll
[DAG, X86] Revert r327197 "Revert r327170, r327171, r327172"
2018-03-19 20:19:46 +00:00
pr36553.ll
[X86] Make sure we don't combine (fneg (fma X, Y, Z)) to a target specific node when there are no FMA instructions.
2018-03-01 00:08:38 +00:00
pr36602.ll
[DAG] Avoid using deleted node in rebuildSetCC
2018-05-10 14:28:54 +00:00
pr36865.ll
[DAG, X86] Fix ISel-time node insertion ids
2018-03-22 19:32:07 +00:00
pr37063.ll
[X86] Prevent folding loads with 64-bit ANDs with immediates that fit in 32-bits.
2018-04-10 03:44:15 +00:00
pr37264.ll
Follow-up to rL332176 by adding a test case for PR37264.
2018-05-13 14:32:23 +00:00
pr37359.ll
[SelectionDAG] Don't crash on inline assembly errors when the inline assembly return type is a struct.
2018-06-20 04:32:05 +00:00
pr37499.ll
[X86] Directly legalize v16i16/v8i16 vselect to vXi8 vselect to use VPBLENDVB
2018-05-18 17:48:06 +00:00
pr37820.ll
[DAG] Fix and-mask folding when narrowing loads.
2018-06-20 15:36:29 +00:00
pr37826.ll
[DAG] Fix Memory ordering check in ReduceLoadOpStore.
2018-07-20 15:20:50 +00:00
pr37879.ll
[X86] Remove the changes to combineScalarToVector made in r335037.
2018-06-25 00:21:53 +00:00
pr37916.ll
[ScheduleDAG] Fix unfolding of SUnits to already existent nodes.
2018-07-18 18:01:03 +00:00
pr38038.ll
Add x86_64-unkown triple to llc for x86 test.
2018-07-20 03:50:55 +00:00
pr38185.ll
[DAG] Avoid Node Update assertion due to AND simplification
2018-07-20 15:27:24 +00:00
pr38533.ll
[DAGCombine] Improve Load-Store Forwarding
2018-10-10 14:15:52 +00:00
pr38539.ll
[DAGCombiner] Improve X div/rem Y fold if single bit element type
2018-10-30 09:07:22 +00:00
pr38639.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
pr38738.ll
[X86] Correctly use SSE registers if no-x87 is selected.
2018-10-03 14:13:30 +00:00
pr38762.ll
[DebugInfo][Dexter] Unreachable line stepped onto after SimplifyCFG.
2018-10-25 09:58:59 +00:00
pr38763.ll
[DebugInfo][Dexter] Unreachable line stepped onto after SimplifyCFG.
2018-10-25 09:58:59 +00:00
pr38795.ll
[X86] Enable the MachineVerifier by default
2018-10-29 16:57:43 +00:00
pr38803.ll
[X86] Stop X86DomainReassignment from creating copies between GR8/GR16 physical registers and k-registers.
2018-10-01 07:08:41 +00:00
pr38819.ll
[X86] Don't create FILD ISD nodes when X87 is disabled.
2018-09-25 00:16:57 +00:00
pr38865-2.ll
[X86] Teach X86FastISel::X86SelectRet to use EAX for the sret pointer in GNUX32
2018-09-11 17:57:23 +00:00
pr38865-3.ll
[X86] Fix inline expansion for memset in x32
2018-09-22 05:16:35 +00:00
pr38865.ll
[X86] Teach X86SelectionDAGInfo::EmitTargetCodeForMemcpy about GNUX32
2018-09-12 01:57:22 +00:00
pr38952.mir
[MachineSink][DebugInfo] Correctly sink DBG_VALUEs
2018-11-02 16:52:48 +00:00
pr39187-g.ll
[DebugInfo][Dexter] Unreachable line stepped onto after SimplifyCFG.
2018-11-09 09:42:10 +00:00
pr39243.ll
[DebugInfo][Dexter] Unreachable line stepped onto after SimplifyCFG.
2018-10-25 09:58:59 +00:00
PR34565.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
PR37310.mir
[X86] Fix llc invocation on MIR test case
2018-10-25 14:11:07 +00:00
pre-coalesce-2.ll
[RegisterCoalescing] Recommit the patch "Remove partial redundent copy".
2017-01-28 01:05:27 +00:00
pre-coalesce.ll
[RegisterCoalescing] Recommit the patch "Remove partial redundent copy".
2017-01-28 01:05:27 +00:00
pre-coalesce.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
pre-ra-sched.ll
…
prefer-avx256-lzcnt.ll
[X86] Teach X86 codegen to use vector width preference to avoid promoting to 512-bit types when VLX is enabled and the preference is for a smaller size.
2018-01-20 00:26:12 +00:00
prefer-avx256-mask-extend.ll
[X86][SSE] Consistently prefer lowering to PACKUS over PACKSS
2018-06-08 10:29:00 +00:00
prefer-avx256-mask-shuffle.ll
[X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.
2018-11-09 19:05:51 +00:00
prefer-avx256-popcnt.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
prefer-avx256-shift.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
prefer-avx256-trunc.ll
[X86] Move the promotion of v16i16->v16i8 for avx512f but not avx512bw from lowering to isel. Change to use vpmovzx instead of vpmovsx.
2018-11-09 20:09:53 +00:00
prefer-avx256-wide-mul.ll
[X86] When lowering v32i8 MULHS/MULHU, shuffle after the PACKUS rather than before.
2018-08-27 17:20:41 +00:00
prefetch.ll
[X86] Add prefetchwt1 instruction and overhaul priorities and isel enabling for prefetch instructions.
2017-12-22 02:30:30 +00:00
prefixdata.ll
Ensure that prefix data is preserved with subsections-via-symbols
2017-03-15 04:18:16 +00:00
preserve_allcc64.ll
…
preserve_mostcc64.ll
…
private-2.ll
…
private.ll
…
prolog-push-seq.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
prologue-epilogue-remarks.mir
[PEI] Fix failing test caused by r324283
2018-02-05 23:06:47 +00:00
prologuedata.ll
…
promote-assert-zext.ll
…
promote-i16.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
promote-trunc.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
promote-vec3.ll
[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)
2018-05-01 19:26:15 +00:00
promote.ll
[X86][SSE] Aggressively use PMADDWD for v4i32 multiplies with 17 or more leading zeros
2018-01-24 19:20:02 +00:00
ps4-noreturn.ll
…
pseudo_cmov_lower1.ll
…
pseudo_cmov_lower2.ll
[X86] Regenerate test checks in preparation for a patch. NFC
2018-11-05 19:45:37 +00:00
pseudo_cmov_lower.ll
…
pshufb-mask-comments.ll
Recommit r344877 "[X86] Stop promoting integer loads to vXi64"
2018-10-22 22:14:05 +00:00
pshufd-combine-crash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
psubus.ll
[X86] Don't emit *_extend_vector_inreg nodes when both the input and output types are legal with AVX1
2018-11-02 21:09:49 +00:00
ptest.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
ptr-rotate.ll
…
ptrtoint-constexpr.ll
…
ptwrite32-intrinsic.ll
[X86] ptwrite intrinsic
2018-05-10 07:26:05 +00:00
ptwrite64-intrinsic.ll
[X86] ptwrite intrinsic
2018-05-10 07:26:05 +00:00
push-cfi-debug.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
push-cfi-obj.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
push-cfi.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
ragreedy-bug.ll
Codegen: Tail-duplicate during placement.
2016-10-11 20:36:43 +00:00
ragreedy-hoist-spill.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
ragreedy-last-chance-recoloring.ll
…
rd-mod-wr-eflags.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
rdpid-schedule.ll
[X86] Split up -march=icelake to -client & -server
2018-04-10 18:59:13 +00:00
rdpid.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
rdpmc.ll
[X86] Regenerate RDPMC intrinsic test
2018-01-19 12:05:58 +00:00
rdrand-schedule.ll
[CodeGen] assume max/default throughput for unspecified instructions
2018-06-05 23:34:45 +00:00
rdrand-x86_64.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
rdrand.ll
[LoopStrengthReduce, x86] don't add cost for a cmp that will be macro-fused (PR35681)
2018-02-05 23:43:05 +00:00
rdseed-schedule.ll
[CodeGen] assume max/default throughput for unspecified instructions
2018-06-05 23:34:45 +00:00
rdseed-x86_64.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
rdseed.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
rdtsc-upgrade.ll
[X86] Modify the the rdtscp intrinsic to return values instead of taking a pointer argument
2018-09-07 19:14:15 +00:00
rdtsc.ll
[X86] Modify the the rdtscp intrinsic to return values instead of taking a pointer argument
2018-09-07 19:14:15 +00:00
read-fp-no-frame-pointer.ll
…
recip-fastmath2.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
recip-fastmath.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
recip-pic.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
red-zone2.ll
…
red-zone.ll
…
reduce-trunc-shl.ll
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
2018-09-19 18:11:34 +00:00
regalloc-advanced-split-cost.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
regalloc-reconcile-broken-hints.ll
[LSR] Narrow search space by filtering non-optimal formulae with the same ScaledReg and Scale.
2017-07-06 15:52:14 +00:00
regalloc-spill-at-ehpad.ll
…
regcall-no-plt.ll
[X86] Disabling PLT in Regcall CC Functions
2017-05-04 07:22:49 +00:00
reghinting.ll
…
regparm.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
regpressure.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
rem_crash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
rem.ll
[DAGCombiner] Teach DAG combiner that A-(B-C) can be folded to A+(C-B)
2018-07-28 00:27:25 +00:00
remat-constant.ll
…
remat-fold-load.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
remat-mov-0.ll
…
remat-phys-dead.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
remat-scalar-zero.ll
…
replace_unsupported_masked_mem_intrin.ll
[CodeGen] Do not allow opt-bisect-limit to skip ScalarizeMaskedMemIntrin.
2018-04-24 09:24:29 +00:00
replace-load-and-with-bzhi.ll
[X86] Recognize constant arrays with special values and replace loads from it with subtract and shift instructions, which then will be replaced by X86 BZHI machine instruction.
2017-12-12 14:13:51 +00:00
ret-addr.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
ret-i64-0.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
ret-mmx.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
retpoline-external.ll
[Spectre] Fix MIR verifier errors in retpoline thunks
2018-10-26 20:26:36 +00:00
retpoline-regparm.ll
[Spectre] Fix MIR verifier errors in retpoline thunks
2018-10-26 20:26:36 +00:00
retpoline.ll
[Spectre] Fix MIR verifier errors in retpoline thunks
2018-10-26 20:26:36 +00:00
return_zeroext_i2.ll
…
return-ext.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
returned-trunc-tail-calls.ll
…
reverse_branches.ll
…
rip-rel-address.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
rip-rel-lea.ll
…
rodata-relocs.ll
…
rot16.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
rot32.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
rot64.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
rotate2.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
rotate4.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
rotate_vec.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
rotate-extract-vector.ll
[DAGCombiner] Bug 31275- Extract a shift from a constant mul or udiv if a rotate can be formed
2018-07-30 16:50:00 +00:00
rotate-extract.ll
[DAGCombiner] Bug 31275- Extract a shift from a constant mul or udiv if a rotate can be formed
2018-07-30 16:50:00 +00:00
rotate.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
rounding-ops.ll
[X86] Add isel patterns for folding loads when creating ROUND instructions from ffloor/fnearbyint/fceil/frint/ftrunc.
2018-06-12 00:48:57 +00:00
rrlist-livereg-corrutpion.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
rtm-schedule.ll
[X86] Remove FeatureRTM from Skylake processor list
2018-10-10 07:43:35 +00:00
rtm.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
sad_variations.ll
[X86][AVX] Add AVX1 PSAD tests
2018-02-26 15:55:25 +00:00
sad.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
sadd_sat.ll
[Intrinsic] Signed Saturation Addition Intrinsic
2018-10-16 17:35:41 +00:00
saddo-redundant-add.ll
…
safestack_inline.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
safestack_ssp.ll
[Fuchsia] Use thread-pointer ABI slots for stack-protector and safe-stack
2017-02-24 03:10:10 +00:00
safestack.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
sandybridge-loads.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
sar_fold64.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
sar_fold.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sat-add.ll
[X86] Stop promoting vector and/or/xor/andn to vXi64.
2018-10-26 17:21:26 +00:00
sbb.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
scalar_sse_minmax.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
scalar_widen_div.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
scalar-extract.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
scalar-fp-to-i64.ll
[X86][AVX512DQ] Use packed instructions for scalar FP<->i64 conversions on 32-bit targets
2018-05-16 17:40:07 +00:00
scalar-int-to-fp.ll
[X86] Remove an fp->int->fp domain crossing in LowerUINT_TO_FP_i64.
2018-09-15 16:23:35 +00:00
scalar-min-max-fill-operand.ll
…
scalarize-bitcast.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
scatter-schedule.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
scavenger.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
scev-interchange.ll
…
schedule-x86_32.ll
[X86][BdVer2] Fix loads/stores throughput for Piledriver (PR39465)
2018-11-10 14:31:43 +00:00
schedule-x86_64.ll
[X86][BdVer2] Fix loads/stores throughput for Piledriver (PR39465)
2018-11-10 14:31:43 +00:00
schedule-x86-64-shld.ll
[X86][BdVer2] Fix loads/stores throughput for Piledriver (PR39465)
2018-11-10 14:31:43 +00:00
scheduler-backtracking.ll
Revert r345165 "[X86] Bring back the MOV64r0 pseudo instruction"
2018-10-31 21:53:24 +00:00
sdiv-exact.ll
[TargetLowering] Add support for non-uniform vectors to BuildExactSDIV
2018-08-15 09:35:12 +00:00
sdiv-pow2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
section_mergeable_size.ll
[MC][ELF] fix newly added test
2018-10-12 16:35:44 +00:00
segmented-stacks-dynamic.ll
[X86] improve split-stack machine BB placement
2018-11-07 17:41:57 +00:00
segmented-stacks.ll
[X86] improve split-stack machine BB placement
2018-11-07 17:41:57 +00:00
seh-catch-all-win32.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
seh-catch-all.ll
…
seh-catchpad.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
seh-except-finally.ll
…
seh-exception-code.ll
…
seh-filter-no-personality.ll
…
seh-finally.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
seh-no-invokes.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
seh-safe-div-win32.ll
…
seh-safe-div.ll
…
seh-stack-realign.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
select_const.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
select_meta.ll
Fix some broken CHECK lines.
2017-01-22 20:28:56 +00:00
select-1-or-neg1.ll
[x86] add select test to show there's no single right answer (PR28968); NFC
2018-02-12 22:19:24 +00:00
select-mmx.ll
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
2018-08-11 05:33:00 +00:00
select-with-and-or.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
select.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
selectcc-to-shiftand.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
selectiondag-crash.ll
…
selectiondag-cse.ll
…
selectiondag-debug-loc.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
selectiondag-dominator.ll
[x86] Stop this test from dirtying the source tree when run.
2017-06-06 03:24:22 +00:00
selectiondag-order.ll
[DAG] Don't increase SDNodeOrder for dbg.value/declare.
2017-01-19 13:55:55 +00:00
setcc-combine.ll
[DAGCombine] Don't combine (and (setne X, 0), (setne X, -1)) --> (setuge (add X, 1), 2) for i1
2017-12-26 14:48:28 +00:00
setcc-logic.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
setcc-lowering.ll
[X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.
2018-11-09 19:05:51 +00:00
setcc-narrowing.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
setcc-wide-types.ll
[X86] Add AVX512 support to combineVectorSizedSetCCEquality.
2018-09-25 16:27:12 +00:00
setcc.ll
[X86] Don't promote i16 compares to i32 if the immediate will fit in 8 bits.
2018-10-05 18:13:36 +00:00
setjmp-spills.ll
…
setoeq.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
setuge.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sext-i1.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
sext-load.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sext-ret-val.ll
…
sext-setcc-self.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sext-subreg.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sext-trunc.ll
…
sha-schedule.ll
[X86] Fix skylake server scheduling info.
2018-06-11 14:37:53 +00:00
sha.ll
[X86] When post-processing the DAG to remove zero extending moves for YMM/ZMM, make sure the producing instruction is VEX/XOP/EVEX encoded.
2018-08-03 04:49:42 +00:00
shadow-call-stack.mir
ShadowCallStack/x86_64: Ignore pseudo-machine instructions
2018-04-10 01:31:01 +00:00
shadow-stack.ll
SelectionDAGBuilder, mach-o: Skip trap after noreturn call (for Mach-O)
2018-06-28 17:00:45 +00:00
shift-and.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
shift-avx2-crash.ll
…
shift-bmi2.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
shift-coalesce.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shift-codegen.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
shift-combine-crash.ll
…
shift-combine.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
shift-double-x86_64.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
shift-double.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
shift-folding.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
shift-i128.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shift-i256.ll
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00
shift-one.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shift-pair.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
shift-parts.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shift-pcmp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
shl_elim.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shl_undef.ll
…
shl-anyext.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shl-crash-on-legalize.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
shl-i64.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shrink_vmul_sse.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
shrink_vmul.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
shrink_wrap_dbg_value.mir
MachineOperand/MIParser: Do not print debug-use flag, infer it
2018-10-30 23:28:27 +00:00
shrink-compare.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
shrink-fp-const1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shrink-fp-const2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shrink-wrap-chkstk-x86_64.ll
[X86] Handle EAX being live when calling chkstk for x86_64
2018-03-06 06:00:13 +00:00
shrink-wrap-chkstk.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
shrink-wrapping-vla.ll
Add tests for shrink wrapping and VLAs
2018-04-18 13:37:12 +00:00
shrinkwrap-hang.ll
…
shuffle-combine-crash-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
shuffle-combine-crash.ll
…
shuffle-of-insert.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
shuffle-of-splat-multiuses.ll
[x86] try to form broadcast before widening shuffle elements
2018-11-09 14:54:58 +00:00
shuffle-strided-with-offset-128.ll
X86 Tests: Update more isel tests with FastVariableShuffle feature
2018-01-09 16:26:06 +00:00
shuffle-strided-with-offset-256.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
shuffle-strided-with-offset-512.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
shuffle-vs-trunc-128.ll
[X86][AVX512] Add VBMI target shuffle-trunc tests
2018-01-30 16:01:41 +00:00
shuffle-vs-trunc-256.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
shuffle-vs-trunc-512.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
sibcall-2.ll
[X86] Add *SP to tailcall register class to fix verifier error
2018-10-24 21:09:34 +00:00
sibcall-3.ll
…
sibcall-4.ll
…
sibcall-5.ll
Update tests to use at least darwin9.
2016-06-29 14:51:10 +00:00
sibcall-6.ll
…
sibcall-byval.ll
Update tests to use at least darwin9.
2016-06-29 14:51:10 +00:00
sibcall-win64.ll
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
2017-07-17 20:05:19 +00:00
sibcall.ll
[X86] Add *SP to tailcall register class to fix verifier error
2018-10-24 21:09:34 +00:00
signbit-shift.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
signed-truncation-check.ll
[X86] Don't promote i16 compares to i32 if the immediate will fit in 8 bits.
2018-10-05 18:13:36 +00:00
simple-register-allocation-read-undef.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
simple-zext.ll
…
sincos-opt.ll
[X86] Don't use fsin/fcos/fsincos instructions ever
2017-08-11 20:55:29 +00:00
sincos.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sink-blockfreq.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sink-cheap-instructions.ll
…
sink-gep-before-mem-inst.ll
[CGP] Relax a bit restriction for optimizeMemoryInst to extend scope
2017-07-11 06:24:44 +00:00
sink-hoist.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sink-local-value.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
sink-out-of-loop.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sitofp.ll
[X86] Fix missing cfi from sitofp checks
2018-04-24 13:24:56 +00:00
sjlj-baseptr.ll
…
sjlj-eh.ll
[X86] Enable the MachineVerifier by default
2018-10-29 16:57:43 +00:00
sjlj-shadow-stack-liveness.mir
[X86] Fix liveness information when expanding X86::EH_SjLj_LongJmp64
2018-08-17 14:46:56 +00:00
sjlj.ll
…
slow-incdec.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
slow-pmulld.ll
[X86] Revert the SLM part of r328914.
2018-04-09 17:07:40 +00:00
slow-unaligned-mem.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
small-byval-memcpy.ll
AMD BdVer2 (Piledriver) Initial Scheduler model
2018-10-27 20:46:30 +00:00
smul-with-overflow.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
soft-fp-legal-in-HW-reg.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
soft-fp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
soft-sitofp.ll
…
speculative-load-hardening-call-and-ret.ll
[x86/SLH] Teach SLH to harden against the "ret2spec" attack by
2018-09-04 10:59:10 +00:00
speculative-load-hardening-gather.ll
[x86/SLH] Add a real Clang flag and LLVM IR attribute for Speculative
2018-09-04 12:38:00 +00:00
speculative-load-hardening-indirect.ll
[X86] Enable the MachineVerifier by default
2018-10-29 16:57:43 +00:00
speculative-load-hardening.ll
[x86/SLH] Add a real Clang flag and LLVM IR attribute for Speculative
2018-09-04 12:38:00 +00:00
splat-const.ll
…
splat-for-size.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
split-eh-lpad-edges.ll
…
split-extend-vector-inreg.ll
[SelectionDAG] Add initial implementation of TargetLowering::SimplifyDemandedVectorElts
2018-02-15 12:14:15 +00:00
split-store.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
split-vector-bitcast.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
split-vector-rem.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sqrt-fastmath-mir.ll
propagate fast math flags via IR on fma and sub expressions
2018-06-07 22:49:09 +00:00
sqrt-fastmath-tune.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sqrt-fastmath.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
sqrt-partial.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sqrt.ll
…
sret-implicit.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
sse1-fcopysign.ll
[X86] Recognize constant splats in LowerFCOPYSIGN.
2018-10-28 23:51:35 +00:00
sse1.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
sse2-intrinsics-canonical.ll
[X86] Move promotion of vector and/or/xor from legalization to DAG combine
2018-10-15 01:51:58 +00:00
sse2-intrinsics-fast-isel-x86_64.ll
[X86][SSE] Cleanup SSE2 intrinsics tests
2018-06-02 19:43:14 +00:00
sse2-intrinsics-fast-isel.ll
[X86] Add patterns for vector and/or/xor/andn with other types than vXi64.
2018-10-22 06:30:22 +00:00
sse2-intrinsics-x86_64-upgrade.ll
[X86][SSE] Cleanup SSE2 intrinsics tests
2018-06-02 19:43:14 +00:00
sse2-intrinsics-x86_64.ll
[X86][SSE] Cleanup SSE2 intrinsics tests
2018-06-02 19:43:14 +00:00
sse2-intrinsics-x86-upgrade.ll
[X86] Lowering addus/subus intrinsics to native IR
2018-08-14 08:00:56 +00:00
sse2-intrinsics-x86.ll
[X86] Fix a bad bitcast in the load form of vXi16 uniform shift patterns for EVEX encoded instructions.
2018-10-15 21:51:32 +00:00
sse2-schedule.ll
[X86][BdVer2] Fix loads/stores throughput for Piledriver (PR39465)
2018-11-10 14:31:43 +00:00
sse2-vector-shifts.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sse2.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
sse3-avx-addsub-2.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
sse3-avx-addsub.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sse3-intrinsics-fast-isel.ll
[X86][SSE] Cleanup SSE3/SSSE3 intrinsics tests
2018-06-02 18:41:46 +00:00
sse3-intrinsics-x86.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
sse3-schedule.ll
AMD BdVer2 (Piledriver) Initial Scheduler model
2018-10-27 20:46:30 +00:00
sse3.ll
[SelectionDAG] Enable SimplifyDemandedVectorElts support for simplifying shuffle masks
2018-02-16 16:22:14 +00:00
sse4a-intrinsics-fast-isel.ll
[X86][SSE] Cleanup SSE4A/SSE41/SSE42 intrinsics tests
2018-06-02 17:33:26 +00:00
sse4a-schedule.ll
AMD BdVer2 (Piledriver) Initial Scheduler model
2018-10-27 20:46:30 +00:00
sse4a-upgrade.ll
[X86][SSE] Cleanup SSE4A/SSE41/SSE42 intrinsics tests
2018-06-02 17:33:26 +00:00
sse4a.ll
[X86][SSE] Cleanup SSE4A/SSE41/SSE42 intrinsics tests
2018-06-02 17:33:26 +00:00
sse41-intrinsics-fast-isel.ll
[SelectionDAG] Respect multiple uses in SimplifyDemandedBits to SimplifyDemandedVectorElts simplification
2018-10-07 11:45:46 +00:00
sse41-intrinsics-x86-upgrade.ll
[X86] Prefer blendi over movss/sd when avx512 is enabled unless optimizing for size.
2018-07-14 02:05:08 +00:00
sse41-intrinsics-x86.ll
[X86][SSE4] Tweak rL333828 sse41/sse42 cleanup to recover SKX/EVEX2VEX testing
2018-06-02 18:01:09 +00:00
sse41-pmovxrm.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sse41-schedule.ll
[X86][NFC] sse41-schedule.ll: disable XOP for BdVer2 tests
2018-10-28 13:39:06 +00:00
sse41.ll
[x86] try harder to use broadcast to load a scalar into vector reg
2018-08-25 14:56:05 +00:00
sse42-intrinsics-fast-isel-x86_64.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
sse42-intrinsics-fast-isel.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
sse42-intrinsics-x86_64.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
sse42-intrinsics-x86.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
sse42-schedule.ll
[X86][NFC] sse42-schedule.ll: disable XOP for BdVer2 tests
2018-10-28 13:39:10 +00:00
sse_partial_update.ll
[x86] add test for SSE sqrtss register dep (PR22206)
2018-10-04 17:59:30 +00:00
sse_reload_fold.ll
…
sse-align-0.ll
…
sse-align-1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-3.ll
…
sse-align-4.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-5.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-6.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-7.ll
…
sse-align-8.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-9.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-10.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-11.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-12.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sse-commute.ll
…
sse-cvttp2si.ll
[DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros
2018-06-27 18:16:40 +00:00
sse-domains.ll
…
sse-fcopysign.ll
[X86] Remove some composite MOVSS/MOVSD isel patterns.
2018-07-11 04:51:40 +00:00
sse-fsignum.ll
[X86] Extend inputs with elements smaller than i32 to sint_to_fp/uint_to_fp before type legalization.
2018-02-10 17:58:58 +00:00
sse-intel-ocl.ll
[X86] Optimization for replacing LEA with MOV at frame index elimination time
2016-09-26 06:42:07 +00:00
sse-intrinsics-fast-isel-x86_64.ll
[X86][SSE] Cleanup SSE1 intrinsics tests
2018-06-02 20:25:56 +00:00
sse-intrinsics-fast-isel.ll
[X86] Add some isel patterns for scalar_to_vector/extract_vector_element that use the avx512 extended register classes when they are available.
2018-10-27 05:35:20 +00:00
sse-intrinsics-x86_64-upgrade.ll
[X86][SSE] Cleanup SSE1 intrinsics tests
2018-06-02 20:25:56 +00:00
sse-intrinsics-x86_64.ll
[X86][SSE] Cleanup SSE1 intrinsics tests
2018-06-02 20:25:56 +00:00
sse-intrinsics-x86-upgrade.ll
[X86] Add AVX512 equivalents of some isel patterns so we get EVEX instructions.
2018-07-12 22:14:10 +00:00
sse-intrinsics-x86.ll
[X86] Lowering sqrt intrinsics to native IR
2018-06-15 18:05:24 +00:00
sse-load-ret.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-minmax.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sse-only.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sse-regcall.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
sse-scalar-fp-arith-unary.ll
[X86][SSE] Cleanup SSE1 intrinsics tests
2018-06-02 20:25:56 +00:00
sse-scalar-fp-arith.ll
[X86][SSE] Canonicalize scalar fp arithmetic shuffle patterns
2018-07-18 19:55:19 +00:00
sse-schedule.ll
[X86][BdVer2] Fix loads/stores throughput for Piledriver (PR39465)
2018-11-10 14:31:43 +00:00
sse-unaligned-mem-feature.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-varargs.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
ssp-data-layout.ll
…
ssp-guard-spill.ll
…
ssse3-intrinsics-fast-isel.ll
[X86][SSE] Cleanup SSE3/SSSE3 intrinsics tests
2018-06-02 18:41:46 +00:00
ssse3-intrinsics-x86.ll
[X86][SSE] Cleanup SSE3/SSSE3 intrinsics tests
2018-06-02 18:41:46 +00:00
ssse3-schedule.ll
AMD BdVer2 (Piledriver) Initial Scheduler model
2018-10-27 20:46:30 +00:00
ssub_sat.ll
[Intrinsic] Signed and Unsigned Saturation Subtraction Intirnsics
2018-10-29 16:54:37 +00:00
stack_guard_remat.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
stack-align2.ll
…
stack-align-memcpy.ll
…
stack-align.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
stack-folding-3dnow.ll
…
stack-folding-adx-x86_64.ll
[X86] Remove isel patterns for ADCX instruction
2018-09-12 15:47:34 +00:00
stack-folding-adx.mir
[X86] Add stack folding MIR test for ADCX/ADOX.
2018-09-08 05:08:18 +00:00
stack-folding-bmi2.ll
[X86][BMI] Add BMI2 stack folding tests
2017-02-17 18:00:43 +00:00
stack-folding-bmi.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
stack-folding-fp-avx1.ll
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
2018-06-21 06:17:16 +00:00
stack-folding-fp-avx512.ll
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
2018-06-27 15:57:53 +00:00
stack-folding-fp-avx512vl.ll
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
2018-06-27 15:57:53 +00:00
stack-folding-fp-sse42.ll
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
2018-06-21 06:17:16 +00:00
stack-folding-int-avx1.ll
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
2018-06-21 06:17:16 +00:00
stack-folding-int-avx2.ll
[x86] adjust tests to preserve behavior; NFC
2018-10-26 23:06:28 +00:00
stack-folding-int-avx512.ll
[x86] adjust tests to preserve behavior; NFC
2018-10-26 23:06:28 +00:00
stack-folding-int-avx512vl.ll
[x86] adjust tests to preserve behavior; NFC
2018-10-26 23:06:28 +00:00
stack-folding-int-sse42.ll
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
2018-06-21 06:17:16 +00:00
stack-folding-lwp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
stack-folding-mmx.ll
…
stack-folding-sha.ll
[X86][SHA] Add SHA stack folding tests
2017-02-17 19:24:55 +00:00
stack-folding-tbm.ll
[X86][TBM] Use realistic BEXTR control bits
2018-06-03 18:15:06 +00:00
stack-folding-x86_64.ll
…
stack-folding-xop.ll
…
stack-probe-red-zone.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
stack-probe-size.ll
…
stack-probes.ll
[X86] Add support for "probe-stack" attribute
2017-06-22 15:42:53 +00:00
stack-protector-dbginfo.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
stack-protector-msvc.ll
Re-commit r319490 "XOR the frame pointer with the stack cookie when protecting the stack"
2017-12-05 20:22:20 +00:00
stack-protector-remarks.ll
[SSP] In opt remarks, stream Function directly
2017-03-09 06:10:27 +00:00
stack-protector-target.ll
Disable TLS for stack protector on Android API<17.
2017-02-23 21:06:35 +00:00
stack-protector-vreg-to-vreg-copy.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
stack-protector-weight.ll
[CodeGen] Use MIR syntax for MachineMemOperand printing
2018-03-14 21:52:13 +00:00
stack-protector.ll
[MinGW] [X86] Add stubs for references to data variables that might end up imported from a dll
2018-08-29 17:28:34 +00:00
stack-size-section-function-sections.ll
Recommit r335333 "[MC] - Add .stack_size sections into groups and link them with .text"
2018-06-22 10:53:47 +00:00
stack-size-section.ll
Recommit r335333 "[MC] - Add .stack_size sections into groups and link them with .text"
2018-06-22 10:53:47 +00:00
stack-update-frame-opcode.ll
…
StackColoring-dbg.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
StackColoring.ll
StackColoring: smarter check for slot overlap
2017-06-12 14:56:02 +00:00
stackguard-internal.ll
…
stackmap-fast-isel.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
stackmap-frame-setup.ll
Add extra operand to CALLSEQ_START to keep frame part set up previously
2017-05-09 13:35:13 +00:00
stackmap-large-constants.ll
[StackMaps] Increase the size of the "location size" field
2017-04-28 04:48:42 +00:00
stackmap-large-location-size.ll
[StackMaps] Increase the size of the "location size" field
2017-04-28 04:48:42 +00:00
stackmap-liveness.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
stackmap-nops.ll
…
stackmap-shadow-optimization.ll
…
stackmap.ll
[StackMaps] Increase the size of the "location size" field
2017-04-28 04:48:42 +00:00
stackpointer.ll
…
statepoint-allocas.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
statepoint-call-lowering.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
statepoint-far-call.ll
Add placeholder for more extensive verification of psuedo ops
2017-06-02 16:36:37 +00:00
statepoint-forward.ll
Add placeholder for more extensive verification of psuedo ops
2017-06-02 16:36:37 +00:00
statepoint-gctransition-call-lowering.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
statepoint-invoke.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
statepoint-live-in.ll
Revert change 335077 "[InlineSpiller] Fix a crash due to lack of forward progress from remat specifically for STATEPOINT"
2018-06-25 12:58:13 +00:00
statepoint-stack-usage.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
statepoint-stackmap-format.ll
Add placeholder for more extensive verification of psuedo ops
2017-06-02 16:36:37 +00:00
statepoint-uniqueing.ll
Add placeholder for more extensive verification of psuedo ops
2017-06-02 16:36:37 +00:00
statepoint-vector-bad-spill.ll
Add placeholder for more extensive verification of psuedo ops
2017-06-02 16:36:37 +00:00
statepoint-vector.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
stdarg.ll
[X86][DAG] Switch X86 Target to post-legalized store merge
2017-08-11 13:21:35 +00:00
stdcall-notailcall.ll
…
stdcall.ll
…
store_op_load_fold2.ll
[DAG, X86] Revert r327197 "Revert r327170, r327171, r327172"
2018-03-19 20:19:46 +00:00
store_op_load_fold.ll
…
store-empty-member.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
store-fp-constant.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
store-global-address.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
store-narrow.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
store-zero-and-minus-one.ll
[X86] When using "and $0" and "orl $-1" to store 0 and -1 for minsize, make sure the store isn't volatile
2018-08-06 18:44:26 +00:00
stores-merging.ll
[DAGCombine] Improve alias analysis for chain of independent stores.
2018-11-08 19:14:20 +00:00
storetrunc-fp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
stride-nine-with-base-reg.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
stride-reuse.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sttni.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
sub-with-overflow.ll
…
sub.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
subcarry.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
subreg-to-reg-0.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
subreg-to-reg-1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
subreg-to-reg-2.ll
…
subreg-to-reg-3.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
subreg-to-reg-4.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
subreg-to-reg-6.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
subvector-broadcast.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
sunkaddr-ext.ll
…
swift-error.ll
X86: remove R12 from CSR on Windows x64 SwiftCC
2017-09-25 22:00:17 +00:00
swift-return.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
swiftcc.ll
X86: treat SwiftCC as Win64_CC on Win64
2017-09-20 21:00:40 +00:00
swifterror.ll
Revert r345165 "[X86] Bring back the MOV64r0 pseudo instruction"
2018-10-31 21:53:24 +00:00
swiftself.ll
…
switch-bt.ll
[CodeGen] Peel off the dominant case in switch statement in lowering
2017-11-14 21:44:09 +00:00
switch-crit-edge-constant.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
switch-default-only.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
switch-density.ll
…
switch-edge-weight.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
switch-jump-table.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
switch-lower-peel-top-case.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
switch-or.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
switch-order-weight.ll
…
switch-zextload.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
switch.ll
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00
SwitchLowering.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
swizzle-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
swizzle-avx2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
SwizzleShuff.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
system-intrinsics-64-xsave.ll
…
system-intrinsics-64-xsavec.ll
…
system-intrinsics-64-xsaveopt.ll
…
system-intrinsics-64-xsaves.ll
…
system-intrinsics-64.ll
…
system-intrinsics-xgetbv.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
system-intrinsics-xsave.ll
…
system-intrinsics-xsavec.ll
…
system-intrinsics-xsaveopt.ll
…
system-intrinsics-xsaves.ll
…
system-intrinsics-xsetbv.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
system-intrinsics.ll
…
tail-call-attrs.ll
…
tail-call-casts.ll
…
tail-call-conditional.mir
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
2018-08-11 05:33:00 +00:00
tail-call-got.ll
…
tail-call-legality.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
tail-call-mutable-memarg.ll
[X86] Fix latent bug in sibcall eligibility logic
2017-07-28 00:58:35 +00:00
tail-call-parameter-attrs-mismatch.ll
…
tail-call-win64.ll
Win64: Don't use REX prefix for direct tail calls
2016-09-08 23:35:10 +00:00
tail-dup-addr.ll
…
tail-dup-catchret.ll
…
tail-dup-debugloc.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
tail-dup-merge-loop-headers.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
tail-dup-no-other-successor.ll
CodeGen: BlockPlacement: Don't always tail-duplicate with no other successor.
2017-04-10 22:28:22 +00:00
tail-dup-repeat.ll
Increase tail dup threshold for -O3 from 3 to 4.
2017-08-17 23:38:41 +00:00
tail-merge-after-mbp.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
tail-merge-debugloc.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
tail-merge-identical.ll
CodeGen: BranchFolding: Merge identical blocks, even if they are short.
2017-04-10 22:28:12 +00:00
tail-merge-unreachable.ll
Fix some broken CHECK lines.
2017-01-22 20:28:56 +00:00
tail-merge-wineh.ll
…
tail-opts.ll
[X86] When using "and $0" and "orl $-1" to store 0 and -1 for minsize, make sure the store isn't volatile
2018-08-06 18:44:26 +00:00
tail-threshold.ll
…
tailcall-64.ll
[x86] Clean up and convert test to use generated CHECK lines.
2018-07-24 03:18:08 +00:00
tailcall-calleesave.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
tailcall-cgp-dup.ll
[CGP] Be less conservative about tail-duplicating a ret to allow tail calls
2016-09-08 00:48:37 +00:00
tailcall-disable.ll
…
tailcall-fastisel.ll
…
tailcall-largecode.ll
…
tailcall-lifetime-end.ll
[CodeGen] skip lifetime end marker in isInTailCallPosition
2018-10-24 17:03:19 +00:00
tailcall-mem-intrinsics.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
tailcall-msvc-conventions.ll
…
tailcall-multiret.ll
…
tailcall-readnone.ll
…
tailcall-returndup-void.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
tailcall-ri64.ll
…
tailcall-stackalign.ll
…
tailcall-structret.ll
…
tailcall.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
tailcallbyval64.ll
…
tailcallbyval.ll
…
tailcallfp2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
tailcallfp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
tailcallpic1.ll
…
tailcallpic2.ll
…
tailcallpic3.ll
…
tailcallstack64.ll
…
taildup-crash.ll
Testcase for r279022
2016-08-18 02:21:54 +00:00
tailjmp_gotpcrel_relax_relocation.ll
Relax GOTPCREL relocations for tail jmp instructions.
2018-05-31 18:12:33 +00:00
targetLoweringGeneric.ll
…
tbm_patterns.ll
[X86] Match (cmp (and (shr X, C), mask), 0) to BEXTR+TEST.
2018-10-16 22:29:36 +00:00
tbm-intrinsics-fast-isel-x86_64.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
tbm-intrinsics-fast-isel.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
tbm-intrinsics-x86_64.ll
[X86][BMI][TBM] Only demand bottom 16-bits of the BEXTR control op (PR34042)
2018-06-06 10:52:10 +00:00
tbm-intrinsics.ll
[X86][TBM] Use realistic BEXTR control bits
2018-06-03 18:15:06 +00:00
tbm-schedule.ll
AMD BdVer2 (Piledriver) Initial Scheduler model
2018-10-27 20:46:30 +00:00
test-nofold.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
test-shrink-bug.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
test-shrink.ll
Recommit r343499 "[X86] Enable load folding in the test shrinking code"
2018-10-01 21:35:28 +00:00
test-vs-bittest.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
testb-je-fusion.ll
[X86] Avoid using high register trick for test instruction
2018-01-31 16:48:54 +00:00
testl-commute.ll
[X86] Change register&memory TEST instructions from MRMSrcMem to MRMDstMem
2017-10-01 23:53:53 +00:00
this-return-64.ll
…
throws-cfi-fp.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
throws-cfi-no-fp.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
tls-addr-non-leaf-function.ll
…
tls-android-negative.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
tls-android.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
tls-local-dynamic.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
tls-models.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
tls-pic.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
tls-pie.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
tls-shrink-wrapping.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
tls-windows-itanium.ll
…
tls.ll
[X86] Support for the mno-tls-direct-seg-refs flag
2018-10-18 03:14:37 +00:00
tlv-1.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
tlv-2.ll
…
tlv-3.ll
…
token_landingpad.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
trap.ll
…
trunc-ext-ld-st.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
trunc-store.ll
[SelectionDAG] Fix codegen of vector stores with non byte-sized elements.
2018-01-20 16:05:10 +00:00
trunc-subvector.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
trunc-to-bool.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
TruncAssertSext.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
TruncAssertZext.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
twoaddr-coalesce-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
twoaddr-coalesce-3.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
twoaddr-coalesce.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
twoaddr-lea.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
twoaddr-pass-sink.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
twoaddr-sink-terminator.ll
…
uadd_sat.ll
[Intrinsic] Unigned Saturation Addition Intrinsic
2018-10-22 23:08:40 +00:00
uint64-to-float.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
uint_to_fp-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
uint_to_fp-3.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
uint_to_fp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
umul-with-carry.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
umul-with-overflow.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
umulo-64-legalisation-lowering.ll
[SelectionDAG] Improve the legalisation lowering of UMULO.
2018-08-16 18:39:39 +00:00
umulo-128-legalisation-lowering.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
unaligned-32-byte-memops.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
unaligned-load.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
unaligned-spill-folding.ll
[X86] Add more opcodes to isFrameLoadOpcode/isFrameStoreOpcode. Mainly AVX-512 related.
2016-07-18 06:14:39 +00:00
undef-eflags.mir
X86: Do not optimize branches with undef eflags inputs
2018-10-22 22:52:23 +00:00
undef-globals-bss.ll
Place undefined globals in .bss instead of .data
2018-02-06 23:22:14 +00:00
undef-label.ll
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
2018-08-11 05:33:00 +00:00
undef-ops.ll
[DAG] fix type of undef returned by getNode()
2018-02-13 14:55:07 +00:00
unfold-masked-merge-scalar-constmask-innerouter.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
unfold-masked-merge-scalar-constmask-interleavedbits.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
unfold-masked-merge-scalar-constmask-lowhigh.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
unfold-masked-merge-scalar-variablemask.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
unfold-masked-merge-vector-variablemask-const.ll
[X86] Stop promoting vector and/or/xor/andn to vXi64.
2018-10-26 17:21:26 +00:00
unfold-masked-merge-vector-variablemask.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
unknown-location.ll
[DWARF] Preserve column number when emitting 'line 0' record
2016-12-14 00:27:35 +00:00
unreachable-loop-sinking.ll
…
unreachable-mbb-undef-phi.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
unreachable-trap.ll
SelectionDAGBuilder, mach-o: Skip trap after noreturn call (for Mach-O)
2018-06-28 17:00:45 +00:00
unreachableblockelim.ll
Fix some broken CHECK lines.
2017-01-22 20:28:56 +00:00
unused_stackslots.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
unwind-init.ll
…
unwindraise.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
update-terminator-debugloc.ll
Copy utilities updated and added for MI flags
2018-09-19 18:52:08 +00:00
update-terminator.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
urem-i8-constant.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
urem-power-of-two.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
urem-seteq-optsize.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
urem-seteq-vec-nonsplat.ll
[X86][SSE] Add SimplifyDemandedBitsForTargetNode PMULDQ/PMULUDQ handling
2018-10-24 19:11:28 +00:00
urem-seteq-vec-splat.ll
[DAGCombiner][x86] add transform/hook to decompose integer multiply into shift/add
2018-09-19 15:57:40 +00:00
urem-seteq.ll
[DagCombine][NFC] Some more tests fo for X % C == 0 (UREM case) transform
2018-09-11 15:34:26 +00:00
use-add-flags.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
usub_sat.ll
[Intrinsic] Signed and Unsigned Saturation Subtraction Intirnsics
2018-10-29 16:54:37 +00:00
utf8.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
utf16-cfstrings.ll
…
uwtables.ll
[X86] Remove powerpc cpu name and features from uwtables.ll
2018-08-30 06:01:01 +00:00
v2f32.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
v4f32-immediate.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
v4i32load-crash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
v8i1-masks.ll
[X86] Don't emit *_extend_vector_inreg nodes when both the input and output types are legal with AVX1
2018-11-02 21:09:49 +00:00
vaargs.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vaes-intrinsics-avx512-x86.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vaes-intrinsics-avx512vl-x86.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vaes-intrinsics-avx-x86.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
var-permute-128.ll
[X86] Allow fake unary unpckhpd and movhlps to be commuted for execution domain fixing purposes
2018-08-02 16:48:01 +00:00
var-permute-256.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
var-permute-512.ll
[SelectionDAG] Reverse the order of operands in the ISD::ADD created by TargetLowering::getVectorElementPointer so that the FrameIndex is on the left.
2017-12-22 17:18:13 +00:00
vararg_no_start.ll
…
vararg_tailcall.ll
…
vararg-callee-cleanup.ll
…
variable-sized-darwin-bzero.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
variadic-node-pic.ll
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
2018-07-23 21:14:35 +00:00
vastart-defs-eflags.ll
[X86] Avoid using high register trick for test instruction
2018-01-31 16:48:54 +00:00
vbinop-simplify-bug.ll
…
vec3.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_add.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec_align_i256.ll
…
vec_align.ll
…
vec_anyext.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec_call.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec_cast2.ll
[X86] Don't emit *_extend_vector_inreg nodes when both the input and output types are legal with AVX1
2018-11-02 21:09:49 +00:00
vec_cast3.ll
[X86] Add custom promotion of v2i8/v2i16 fp_to_sint to avoid over promotion to v2i64 which would force scalarization.
2018-11-06 19:24:21 +00:00
vec_cast.ll
[DAGCombiner][X86][Mips] Enable combineShuffleOfScalars to run between vector op legalization and DAG legalization. Fix bad one use check in combineShuffleOfScalars
2018-11-09 18:04:34 +00:00
vec_cmp_sint-128.ll
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32.
2018-10-09 19:05:50 +00:00
vec_cmp_uint-128.ll
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32.
2018-10-09 19:05:50 +00:00
vec_compare-sse4.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_compare.ll
[X86] Autogenerate complete checks. NFC
2018-10-09 17:52:07 +00:00
vec_ctbits.ll
[LegalizeDAG] Share Vector/Scalar CTLZ Expansion
2018-10-23 17:48:30 +00:00
vec_ext_inreg.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_extract-avx.ll
[X86] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector.
2018-10-11 20:36:06 +00:00
vec_extract-mmx.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_extract-sse4.ll
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
2018-09-19 18:11:34 +00:00
vec_extract.ll
[X86] Allow fake unary unpckhpd and movhlps to be commuted for execution domain fixing purposes
2018-08-02 16:48:01 +00:00
vec_fabs.ll
[X86] Standardize floating point assembly comments
2018-10-02 09:08:51 +00:00
vec_floor.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
vec_fneg.ll
[SelectionDAG] allow undefs when matching splat constants
2018-10-05 17:42:19 +00:00
vec_fp_to_int.ll
[X86] Add custom promotion of v2i8/v2i16 fp_to_sint to avoid over promotion to v2i64 which would force scalarization.
2018-11-06 19:24:21 +00:00
vec_fpext.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
vec_fptrunc.ll
[X86] Type legalize v2f32 stores by widening to v4f32, casting to v2f64, extracting f64 and storing.
2018-10-14 03:36:27 +00:00
vec_i64.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_ins_extract-1.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vec_ins_extract.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec_insert-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_insert-3.ll
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
2018-09-19 18:11:34 +00:00
vec_insert-4.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vec_insert-5.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vec_insert-7.ll
[TargetLowering] Add vector BITCAST support to SimplifyDemandedVectorElts
2018-03-06 22:32:01 +00:00
vec_insert-8.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vec_insert-9.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_insert-mmx.ll
[X86][MMX] Support MMX build vectors to avoid SSE usage (PR29222)
2018-03-11 19:22:13 +00:00
vec_int_to_fp.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
vec_loadsingles.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_logical.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_minmax_match.ll
[X86] Use min/max for vector ult/ugt compares if avoids a sign flip.
2018-02-11 17:11:40 +00:00
vec_minmax_sint.ll
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32.
2018-10-09 19:05:50 +00:00
vec_minmax_uint.ll
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32.
2018-10-09 19:05:50 +00:00
vec_partial.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_reassociate.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_return.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_round.ll
…
vec_sdiv_to_shift.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-3.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-4.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-6.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-7.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-8.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-A.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-B.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-C.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-D.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-F.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-H.ll
[X86][SSE] Match PSHUFLW/PSHUFHW + PSHUFD vXi16 shuffle patterns (PR34686)
2017-12-29 14:41:50 +00:00
vec_set.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_setcc-2.ll
[X86] Use min/max for vector ult/ugt compares if avoids a sign flip.
2018-02-11 17:11:40 +00:00
vec_setcc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_shift2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_shift3.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_shift4.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
vec_shift5.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_shift6.ll
[X86][SSE] Prefer BLEND(SHL(v,c1),SHL(v,c2)) over MUL(v, c3)
2018-07-10 07:58:33 +00:00
vec_shift7.ll
[DAGCombiner] Call SimplifyDemandedVectorElts from EXTRACT_VECTOR_ELT
2018-07-17 09:45:35 +00:00
vec_shift.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_shuf-insert.ll
…
vec_split.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec_ss_load_fold.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
vec_trunc_sext.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_udiv_to_shift.ll
…
vec_uint_to_fp-fastmath.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
vec_uint_to_fp.ll
[X86] Standardize floating point assembly comments
2018-10-02 09:08:51 +00:00
vec_unsafe-fp-math.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_zero_cse.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_zero-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec_zero.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec-copysign-avx512.ll
[X86] Stop promoting vector and/or/xor/andn to vXi64.
2018-10-26 17:21:26 +00:00
vec-copysign.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec-libcalls.ll
[SelectionDAG] unroll unsupported vector FP ops earlier to avoid libcalls on undef elements (PR38527)
2018-08-22 22:52:05 +00:00
vec-loadsingles-alignment.ll
…
vec-trunc-store.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-bitreverse.ll
[X86] Stop promoting vector and/or/xor/andn to vXi64.
2018-10-26 17:21:26 +00:00
vector-blend.ll
[X86] Move promotion of vector and/or/xor from legalization to DAG combine
2018-10-15 01:51:58 +00:00
vector-compare-all_of.ll
[DAGCombiner] narrow vector binops when extraction is cheap
2018-10-30 14:14:34 +00:00
vector-compare-any_of.ll
[DAGCombiner] narrow vector binops when extraction is cheap
2018-10-30 14:14:34 +00:00
vector-compare-combines.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-compare-results.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
vector-compare-simplify.ll
[SelectionDAG] Support some SimplifySetCC cases for comparing against vector splats of constants.
2018-03-01 22:15:39 +00:00
vector-constrained-fp-intrinsics-fma.ll
[NFCI][FPEnv] Split constrained intrinsic tests
2018-11-05 15:28:10 +00:00
vector-constrained-fp-intrinsics.ll
[FPEnv] Add constrained CEIL/FLOOR/ROUND/TRUNC intrinsics
2018-11-05 15:59:49 +00:00
vector-extend-inreg.ll
Recommit r344877 "[X86] Stop promoting integer loads to vXi64"
2018-10-22 22:14:05 +00:00
vector-gep.ll
…
vector-half-conversions.ll
[x86] NFC. Reautogenerate test/CodeGen/X86/vector-half-conversions.ll
2018-06-01 13:51:53 +00:00
vector-idiv-sdiv-128.ll
[X86] Use a MOVSX instruction instead of a MOVZX instruction in isel for an any_extend of the remainder from an 8-bit sdivrem.
2018-11-10 06:04:33 +00:00
vector-idiv-sdiv-256.ll
[DAGCombiner][x86] add transform/hook to decompose integer multiply into shift/add
2018-09-19 15:57:40 +00:00
vector-idiv-sdiv-512.ll
[DAGCombiner][x86] add transform/hook to decompose integer multiply into shift/add
2018-09-19 15:57:40 +00:00
vector-idiv-udiv-128.ll
[DAGCombiner][x86] add transform/hook to decompose integer multiply into shift/add
2018-09-19 15:57:40 +00:00
vector-idiv-udiv-256.ll
[DAGCombiner][x86] add transform/hook to decompose integer multiply into shift/add
2018-09-19 15:57:40 +00:00
vector-idiv-udiv-512.ll
[DAGCombiner][x86] add transform/hook to decompose integer multiply into shift/add
2018-09-19 15:57:40 +00:00
vector-idiv-v2i32.ll
Recommit r344877 "[X86] Stop promoting integer loads to vXi64"
2018-10-22 22:14:05 +00:00
vector-idiv.ll
[X86] Replace support for vXi32 SMUL_LOHI/UMUL_LOHI with MULHS/MULHU support instead.
2018-08-25 18:01:24 +00:00
vector-interleave.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
vector-intrinsics.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vector-lzcnt-128.ll
[X86][SSE] LowerVectorCTPOP - pull out repeated byte sum stage.
2018-10-12 14:18:47 +00:00
vector-lzcnt-256.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vector-lzcnt-512.ll
[X86] Stop promoting vector and/or/xor/andn to vXi64.
2018-10-26 17:21:26 +00:00
vector-merge-store-fp-constants.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-mul.ll
[SelectionDAG] Respect multiple uses in SimplifyDemandedBits to SimplifyDemandedVectorElts simplification
2018-10-07 11:45:46 +00:00
vector-narrow-binop.ll
[DAGCombiner] make sure we have a whole-number extract before trying to narrow a vector op (PR39511)
2018-11-01 15:41:12 +00:00
vector-pcmp.ll
[X86] Don't emit *_extend_vector_inreg nodes when both the input and output types are legal with AVX1
2018-11-02 21:09:49 +00:00
vector-popcnt-128.ll
[X86] In LowerHorizontalByteSum, emit vector_shuffle nodes instead of directly using X86ISD::UNPCKL/X86ISD::UNPCKH.
2018-11-10 00:26:42 +00:00
vector-popcnt-256.ll
[X86][SSE] LowerVectorCTPOP - pull out repeated byte sum stage.
2018-10-12 14:18:47 +00:00
vector-popcnt-512.ll
[X86][SSE] LowerVectorCTPOP - pull out repeated byte sum stage.
2018-10-12 14:18:47 +00:00
vector-reduce-add.ll
[DAGCombiner] narrow vector binops when extraction is cheap
2018-10-30 14:14:34 +00:00
vector-reduce-and.ll
[DAGCombiner] narrow vector binops when extraction is cheap
2018-10-30 14:14:34 +00:00
vector-reduce-fadd-fast.ll
[DAGCombiner] narrow vector binops when extraction is cheap
2018-10-30 14:14:34 +00:00
vector-reduce-fadd.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
vector-reduce-fmax-nnan.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
vector-reduce-fmax.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
vector-reduce-fmin-nnan.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
vector-reduce-fmin.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
vector-reduce-fmul-fast.ll
[DAGCombiner] narrow vector binops when extraction is cheap
2018-10-30 14:14:34 +00:00
vector-reduce-fmul.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
vector-reduce-mul.ll
[X86] Move the promotion of v16i16->v16i8 for avx512f but not avx512bw from lowering to isel. Change to use vpmovzx instead of vpmovsx.
2018-11-09 20:09:53 +00:00
vector-reduce-or.ll
[DAGCombiner] narrow vector binops when extraction is cheap
2018-10-30 14:14:34 +00:00
vector-reduce-smax.ll
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32.
2018-10-09 19:05:50 +00:00
vector-reduce-smin.ll
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32.
2018-10-09 19:05:50 +00:00
vector-reduce-umax.ll
[X86] Move promotion of vector and/or/xor from legalization to DAG combine
2018-10-15 01:51:58 +00:00
vector-reduce-umin.ll
[X86] Move promotion of vector and/or/xor from legalization to DAG combine
2018-10-15 01:51:58 +00:00
vector-reduce-xor.ll
[DAGCombiner] narrow vector binops when extraction is cheap
2018-10-30 14:14:34 +00:00
vector-rem.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-rotate-128.ll
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
2018-09-19 18:11:34 +00:00
vector-rotate-256.ll
[DAGCombiner] narrow vector binops when extraction is cheap
2018-10-30 14:14:34 +00:00
vector-rotate-512.ll
[DAGCombiner] narrow vector binops when extraction is cheap
2018-10-30 14:14:34 +00:00
vector-sext.ll
[X86] Move the promotion of v16i16->v16i8 for avx512f but not avx512bw from lowering to isel. Change to use vpmovzx instead of vpmovsx.
2018-11-09 20:09:53 +00:00
vector-shift-ashr-128.ll
[X86] Add vector shift by immediate to SimplifyDemandedBitsForTargetNode.
2018-11-04 17:31:27 +00:00
vector-shift-ashr-256.ll
[X86] Add vector shift by immediate to SimplifyDemandedBitsForTargetNode.
2018-11-04 17:31:27 +00:00
vector-shift-ashr-512.ll
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
2018-08-28 10:37:29 +00:00
vector-shift-lshr-128.ll
[X86] Move promotion of vector and/or/xor from legalization to DAG combine
2018-10-15 01:51:58 +00:00
vector-shift-lshr-256.ll
[X86] getTargetConstantBitsFromNode - add support for rearranging constant bits via shuffles
2018-09-29 17:01:55 +00:00
vector-shift-lshr-512.ll
[X86][AVX] Enable ISD::SRL -> ISD::MULHU for v16i16
2018-09-16 19:20:47 +00:00
vector-shift-shl-128.ll
[X86] Move promotion of vector and/or/xor from legalization to DAG combine
2018-10-15 01:51:58 +00:00
vector-shift-shl-256.ll
[X86] getTargetConstantBitsFromNode - add support for rearranging constant bits via shuffles
2018-09-29 17:01:55 +00:00
vector-shift-shl-512.ll
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
2018-08-28 10:37:29 +00:00
vector-shuffle-128-v2.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
vector-shuffle-128-v4.ll
[x86] try to form broadcast before widening shuffle elements
2018-11-09 14:54:58 +00:00
vector-shuffle-128-v8.ll
[X86][SSE] SimplifyDemandedVectorEltsForTargetNode - simplify PSHUFB masks
2018-10-06 13:49:31 +00:00
vector-shuffle-128-v16.ll
[X86][SSE] Add PR39387 shuffle test case
2018-11-08 14:07:17 +00:00
vector-shuffle-256-v4.ll
[X86][AVX] Add lowerVectorShuffleAsLanePermuteAndPermute for v4f64 shuffles (PR39161)
2018-10-13 11:38:10 +00:00
vector-shuffle-256-v8.ll
[X86] In lowerVectorShuffleAsBroadcast, make peeking through CONCAT_VECTORS work correctly if we already walked through a bitcast that changed the element size.
2018-10-30 18:48:42 +00:00
vector-shuffle-256-v16.ll
[X86][AVX] Enable lowerVectorShuffleAsLanePermuteAndPermute v16i16/v32i8 unary shuffle lowering
2018-10-21 17:07:50 +00:00
vector-shuffle-256-v32.ll
[x86] commute blendvb with constant condition op to allow load folding
2018-10-26 14:58:13 +00:00
vector-shuffle-512-v8.ll
[X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.
2018-11-09 19:05:51 +00:00
vector-shuffle-512-v16.ll
[X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.
2018-11-09 19:05:51 +00:00
vector-shuffle-512-v32.ll
[X86][AVX] Prefer VPBLENDW+VPBLENDD to VPBLENDVB for v16i16 blend shuffles
2018-08-29 10:51:08 +00:00
vector-shuffle-512-v64.ll
[X86] Improve AVX1 shuffle lowering for v8f32 shuffles where the low half comes from V1 and the high half comes from V2 and the halves do the same operation
2018-08-15 21:21:52 +00:00
vector-shuffle-avx512.ll
[X86] getFauxShuffleMask - Handle undef + sentinel values in subvector insertion
2018-10-06 22:13:44 +00:00
vector-shuffle-combining-avx2.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
vector-shuffle-combining-avx512bw.ll
[X86] Remove masked vpermi2var/vpermt2var intrinsics and autoupgrade.
2018-05-29 05:22:05 +00:00
vector-shuffle-combining-avx512bwvl.ll
[X86] Remove masked vpermi2var/vpermt2var intrinsics and autoupgrade.
2018-05-29 05:22:05 +00:00
vector-shuffle-combining-avx512vbmi.ll
[X86] Remove masked vpermi2var/vpermt2var intrinsics and autoupgrade.
2018-05-29 05:22:05 +00:00
vector-shuffle-combining-avx.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
vector-shuffle-combining-sse4a.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
vector-shuffle-combining-sse41.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-shuffle-combining-ssse3.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
vector-shuffle-combining-xop.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
vector-shuffle-combining.ll
[x86] try to form broadcast before widening shuffle elements
2018-11-09 14:54:58 +00:00
vector-shuffle-masked.ll
[X86] Add isel patterns for selecting masked SUBV_BROADCAST with bitcasts. Remove combineBitcastForMaskedOp.
2018-02-05 08:37:37 +00:00
vector-shuffle-mmx.ll
[X86][MMX] Improve handling of 64-bit MMX constants
2018-03-01 22:22:31 +00:00
vector-shuffle-sse1.ll
[X86] Remove the vector alignment requirement from the patterns added in r337320.
2018-07-17 23:26:20 +00:00
vector-shuffle-sse4a.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-shuffle-sse41.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-shuffle-v1.ll
[X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.
2018-11-09 19:05:51 +00:00
vector-shuffle-v48.ll
[X86][AVX] Prefer VPBLENDW+VPBLENDD to VPBLENDVB for v16i16 blend shuffles
2018-08-29 10:51:08 +00:00
vector-shuffle-variable-128.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
vector-shuffle-variable-256.ll
[X86] Remove some composite MOVSS/MOVSD isel patterns.
2018-07-11 04:51:40 +00:00
vector-sqrt.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
vector-trunc-math.ll
[X86] Move the promotion of v16i16->v16i8 for avx512f but not avx512bw from lowering to isel. Change to use vpmovzx instead of vpmovsx.
2018-11-09 20:09:53 +00:00
vector-trunc-packus.ll
[X86] Move the promotion of v16i16->v16i8 for avx512f but not avx512bw from lowering to isel. Change to use vpmovzx instead of vpmovsx.
2018-11-09 20:09:53 +00:00
vector-trunc-ssat.ll
[X86] Move the promotion of v16i16->v16i8 for avx512f but not avx512bw from lowering to isel. Change to use vpmovzx instead of vpmovsx.
2018-11-09 20:09:53 +00:00
vector-trunc-usat.ll
[X86] Move the promotion of v16i16->v16i8 for avx512f but not avx512bw from lowering to isel. Change to use vpmovzx instead of vpmovsx.
2018-11-09 20:09:53 +00:00
vector-trunc.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
vector-truncate-combine.ll
Revert r307036 because of PR34919.
2017-10-12 00:24:52 +00:00
vector-tzcnt-128.ll
[X86] In LowerHorizontalByteSum, emit vector_shuffle nodes instead of directly using X86ISD::UNPCKL/X86ISD::UNPCKH.
2018-11-10 00:26:42 +00:00
vector-tzcnt-256.ll
[X86][SSE] combineIncDecVector - use isConstantSplat
2018-10-13 14:45:44 +00:00
vector-tzcnt-512.ll
[X86] Stop promoting vector and/or/xor/andn to vXi64.
2018-10-26 17:21:26 +00:00
vector-unsigned-cmp.ll
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32.
2018-10-09 19:05:50 +00:00
vector-variable-idx2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vector-variable-idx.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vector-zext.ll
[X86] Don't emit *_extend_vector_inreg nodes when both the input and output types are legal with AVX1
2018-11-02 21:09:49 +00:00
vector-zmov.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vectorcall.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
verifier-generic-extend-truncate.mir
[MachineVerifier][GlobalISel] Verifying generic extends and truncates
2018-05-08 02:48:15 +00:00
verifier-generic-types-1.mir
Follow Up on [MachineVerifier][GlobalISel] NFC, Improving MO printing and refactoring visitMachineInstrBefore
2018-05-07 23:14:00 +00:00
verifier-generic-types-2.mir
[MachineVerifier][GlobalISel] Checking that generic instrs have LLTs on all vregs
2018-05-07 22:31:47 +00:00
verifier-phi-fail0.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
verifier-phi.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
version_directive.ll
[Triple] Add a "macos" OS type that acts as a synonym for "macosx"
2017-05-03 10:42:35 +00:00
vfcmp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
viabs.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
virtual-registers-cleared-in-machine-functions-liveins.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
visibility2.ll
…
visibility.ll
…
vmaskmov-offset.ll
[SelectionDAG][X86] Fix incorrect offset generated for VMASKMOV
2018-02-14 15:55:24 +00:00
vmovq.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
volatile.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vortex-bug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vpshufbitqbm-intrinsics.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vsel-cmp-load.ll
[x86] eliminate even more sign-bit tests with vector select
2018-06-13 12:28:32 +00:00
vselect-2.ll
[X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
2018-01-15 22:18:45 +00:00
vselect-avx.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
vselect-constants.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vselect-minmax.ll
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32.
2018-10-09 19:05:50 +00:00
vselect-packss.ll
[X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.
2018-11-09 19:05:51 +00:00
vselect-pcmp.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
vselect-zero.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vselect.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
vshift_scalar.ll
…
vshift_split2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vshift_split.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vshift-1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vshift-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vshift-3.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vshift-4.ll
[X86][SSE] Avoid vector extraction/insertion for non-constant uniform shifts
2018-08-28 10:14:09 +00:00
vshift-5.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vshift-6.ll
[X86] Move promotion of vector and/or/xor from legalization to DAG combine
2018-10-15 01:51:58 +00:00
vsplit-and.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vzero-excess.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
waitpkg-intrinsics.ll
[X86] WaitPKG instructions
2018-04-20 18:42:47 +00:00
warn-stack.ll
…
wbinvd-intrinsic.ll
[X86] Introduce LLVM wbinvd intrinsic
2018-04-12 18:38:18 +00:00
wbnoinvd-intrinsic.ll
[X86] Describe wbnoinvd instruction
2018-04-11 20:01:57 +00:00
weak_def_can_be_hidden.ll
…
weak-undef.ll
Handle undefined weak hidden symbols on all architectures.
2017-10-27 21:18:48 +00:00
weak.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
webkit-jscc.ll
…
wide-fma-contraction.ll
AMD BdVer2 (Piledriver) Initial Scheduler model
2018-10-27 20:46:30 +00:00
wide-integer-cmp.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
wide-integer-fold.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
widen_arith-1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_arith-2.ll
[X86][SSE] Consistently prefer lowering to PACKUS over PACKSS
2018-06-08 10:29:00 +00:00
widen_arith-3.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_arith-4.ll
[X86][SSE] Prefer BLEND(SHL(v,c1),SHL(v,c2)) over MUL(v, c3)
2018-07-10 07:58:33 +00:00
widen_arith-5.ll
[DAGCombiner] Set the right SDLoc on a newly-created sextload (6/N)
2018-05-11 18:40:08 +00:00
widen_arith-6.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
widen_bitops-0.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
widen_bitops-1.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
widen_cast-1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_cast-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_cast-3.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_cast-4.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_cast-5.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_cast-6.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_compare-1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_conv-1.ll
[TargetLowering] SimplifyDemandedVectorElts - pass demanded elts through ADD/SUB ops
2018-02-24 20:59:14 +00:00
widen_conv-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_conv-3.ll
[DAGCombiner][X86][Mips] Enable combineShuffleOfScalars to run between vector op legalization and DAG legalization. Fix bad one use check in combineShuffleOfScalars
2018-11-09 18:04:34 +00:00
widen_conv-4.ll
[DAGCombiner][X86][Mips] Enable combineShuffleOfScalars to run between vector op legalization and DAG legalization. Fix bad one use check in combineShuffleOfScalars
2018-11-09 18:04:34 +00:00
widen_conversions.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_extract-1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_load-0.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_load-1.ll
[X86] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector.
2018-10-11 20:36:06 +00:00
widen_load-2.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
widen_load-3.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
widen_shuffle-1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
WidenArith.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widened-broadcast.ll
Recommit r344877 "[X86] Stop promoting integer loads to vXi64"
2018-10-22 22:14:05 +00:00
win32_sret.ll
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00
win32-bool.ll
[X86] Fix Windows i1 zeroext conventions to use i8 instead of i32
2018-03-26 18:49:48 +00:00
win32-eh-available-externally.ll
[WinEH] Don't emit state stores or EH thunks for available_externally functions
2017-12-28 18:41:31 +00:00
win32-eh-states.ll
…
win32-eh.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
win32-pic-jumptable.ll
[MC] Suppress .Lcfi labels when emitting textual assembly
2017-10-10 00:57:36 +00:00
win32-preemption.ll
Represent runtime preemption in the IR.
2017-10-26 15:00:26 +00:00
win32-seh-catchpad-realign.ll
…
win32-seh-catchpad.ll
…
win32-seh-nested-finally.ll
…
win32-spill-xmm.ll
Elide stores which are overwritten without being observed.
2017-05-16 19:43:56 +00:00
win32-ssp.ll
[MinGW] [X86] Add stubs for references to data variables that might end up imported from a dll
2018-08-29 17:28:34 +00:00
win64_alloca_dynalloca.ll
…
win64_call_epi.ll
…
win64_eh_leaf2.ll
[WinEH] Adjust decision to emit SEH moves for leaf functions
2017-03-20 17:45:59 +00:00
win64_eh_leaf.ll
Mark functions as not having CFI once we finalize an x86 stack frame
2017-05-03 23:13:42 +00:00
win64_eh.ll
Win64: Don't emit unwind info for "leaf" functions (PR30337)
2016-09-22 19:50:05 +00:00
win64_frame.ll
[x86] Switch EFLAGS copy lowering to use reg-reg form of testing for
2018-04-18 15:52:50 +00:00
win64_nonvol.ll
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
2017-07-17 20:05:19 +00:00
win64_params.ll
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
2017-07-17 20:05:19 +00:00
win64_sibcall.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
win64_vararg.ll
[DAGCombine] Improve Load-Store Forwarding
2018-10-10 14:15:52 +00:00
win64-bool.ll
[X86] Fix Windows i1 zeroext conventions to use i8 instead of i32
2018-03-26 18:49:48 +00:00
win64-byval.ll
[X86ISel] Implement byval lowering for Win64 calling convention
2018-09-17 17:37:14 +00:00
win64-jumptable.ll
Revert "[COFF] Use 32-bit jump table entries in .rdata for Win64"
2016-12-29 17:07:10 +00:00
win64-long-double.ll
[X86] Properly implement the calling convention for f80 for mingw/x86_64
2018-03-20 06:19:38 +00:00
win64-nosse-csrs.ll
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
2017-07-17 20:05:19 +00:00
win_chkstk.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
win_coreclr_chkstk_liveins.mir
[X86] Preserve more liveness information in emitStackProbeInline
2018-07-31 16:41:12 +00:00
win_coreclr_chkstk.ll
[X86] Enable the MachineVerifier by default
2018-10-29 16:57:43 +00:00
win_cst_pool.ll
Revert "[COFF] Use comdat shared constants for MinGW as well"
2018-07-26 10:48:20 +00:00
win-alloca-expander.ll
Codegen: Make chains from trellis-shaped CFGs
2017-02-15 19:49:14 +00:00
win-catchpad-csrs.ll
…
win-catchpad-nested-cxx.ll
…
win-catchpad-nested.ll
…
win-catchpad-varargs.ll
…
win-catchpad.ll
…
win-cleanuppad.ll
MCStreamer: Use "cfi" for CFI related temp labels.
2016-11-30 23:48:26 +00:00
win-funclet-cfi.ll
…
win-mixed-ehpersonality.ll
…
win-smallparams.ll
[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)
2018-05-01 19:26:15 +00:00
windows-itanium-alloca.ll
…
wineh-coreclr.ll
Revert EH-specific checks in BranchFolding that were causing blow ups in compile time.
2016-07-27 17:55:33 +00:00
wineh-exceptionpointer.ll
…
wineh-no-ehpads.ll
…
x32-cet-intrinsics.ll
[X86][CET] Changing -fcf-protection behavior to comply with gcc (LLVM part)
2018-05-18 11:58:25 +00:00
x32-function_pointer-1.ll
…
x32-function_pointer-2.ll
…
x32-function_pointer-3.ll
…
x32-indirectbr.ll
…
x32-landingpad.ll
…
x32-lea-1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
x32-movtopush64.ll
[llvm] Remove redundant --check-prefix=CHECK from tests
2016-10-24 18:57:55 +00:00
x32-va_start.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
x64-cet-intrinsics.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
x86_64-mul-by-const.ll
…
x86-16.ll
[X86] Remove special handling for 16 bit for A asm constraints.
2017-04-16 20:13:08 +00:00
x86-32-intrcc.ll
[X86] Support of no_caller_saved_registers attribute
2017-05-03 13:07:19 +00:00
x86-32-vector-calling-conv.ll
[X86] Add VPADD instructions to X86InstrInfo::isAssociativeAndCommutative.
2016-07-18 06:14:54 +00:00
x86-64-and-mask.ll
…
x86-64-arg.ll
…
x86-64-asm.ll
…
x86-64-baseptr.ll
[X86][x32] Save callee-save register used as base pointer for x32 ABI
2018-03-02 17:46:39 +00:00
x86-64-bittest-logic.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
x86-64-call.ll
…
x86-64-disp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
x86-64-double-precision-shift-left.ll
[X86] Regenerate double shift tests
2018-01-13 16:55:28 +00:00
x86-64-double-precision-shift-right.ll
[X86] Regenerate double shift tests
2018-01-13 16:55:28 +00:00
x86-64-double-shifts-Oz-Os-O2.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
x86-64-double-shifts-var.ll
[X86] Make Feature64Bit useful
2018-08-30 06:01:05 +00:00
x86-64-extend-shift.ll
…
x86-64-flags-intrinsics.ll
…
x86-64-gv-offset.ll
…
x86-64-intrcc-nosse.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
x86-64-intrcc.ll
[X86] Support of no_caller_saved_registers attribute
2017-05-03 13:07:19 +00:00
x86-64-jumps.ll
…
x86-64-mem.ll
…
x86-64-ms_abi-vararg.ll
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
2017-07-17 20:05:19 +00:00
x86-64-pic-1.ll
…
x86-64-pic-2.ll
…
x86-64-pic-3.ll
…
x86-64-pic-4.ll
…
x86-64-pic-5.ll
…
x86-64-pic-6.ll
…
x86-64-pic-7.ll
…
x86-64-pic-8.ll
…
x86-64-pic-9.ll
…
x86-64-pic-10.ll
…
x86-64-pic-11.ll
…
x86-64-pic-12.ll
X86: Do not produce GOT relocations on windows
2016-10-03 20:11:24 +00:00
x86-64-pic.ll
…
x86-64-plt-relative-reloc.ll
…
x86-64-psub.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
x86-64-ptr-arg-simple.ll
…
x86-64-ret0.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
x86-64-shortint.ll
…
x86-64-sret-return-2.ll
…
x86-64-sret-return.ll
…
x86-64-stack-and-frame-ptr.ll
…
x86-64-static-relo-movl.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
x86-64-tls-1.ll
…
x86-64-varargs.ll
…
x86-big-ret.ll
…
x86-cmov-converter.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
x86-flags-intrinsics.ll
…
x86-fold-pshufb.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
x86-framelowering-trap.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
x86-inline-asm-validation.ll
…
x86-interleaved-access.ll
[x86] allow vector load narrowing with multi-use values
2018-11-10 20:05:31 +00:00
x86-interleaved-check.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
x86-interrupt_cc.ll
[llvm-mc] - Produce R_X86_64_PLT32 for "call/jmp foo".
2018-02-20 10:17:57 +00:00
x86-interrupt_cld.ll
…
x86-interrupt_vzeroupper.ll
…
x86-mixed-alignment-dagcombine.ll
…
x86-no_caller_saved_registers-preserve.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
x86-no_caller_saved_registers.ll
Normalize line endings. NFCI,
2017-05-08 13:32:34 +00:00
x86-plt-relative-reloc.ll
…
x86-repmov-copy-eflags.ll
[x86] Switch EFLAGS copy lowering to use reg-reg form of testing for
2018-04-18 15:52:50 +00:00
x86-sanitizer-shrink-wrapping.ll
Fix some broken CHECK lines.
2017-01-22 20:28:56 +00:00
x86-setcc-int-to-fp-combine.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
x86-shifts.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
x86-shrink-wrap-unwind.ll
[X86] improve split-stack machine BB placement
2018-11-07 17:41:57 +00:00
x86-shrink-wrapping.ll
[X86] Don't promote i16 compares to i32 if the immediate will fit in 8 bits.
2018-10-05 18:13:36 +00:00
x86-store-gv-addr.ll
…
x86-upgrade-avx2-vbroadcast.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
x86-upgrade-avx-vbroadcast.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
x86-win64-shrink-wrapping.ll
…
x87-schedule.ll
[X86][BdVer2] Fix loads/stores throughput for Piledriver (PR39465)
2018-11-10 14:31:43 +00:00
x87.ll
[X86] Correctly use SSE registers if no-x87 is selected.
2018-10-03 14:13:30 +00:00
xaluo.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
xchg-nofold.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
xmm-r64.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
xmulo.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
xop-ifma.ll
[X86] Combine vXi64 multiplies to MULDQ/MULUDQ during DAG combine instead of lowering.
2018-04-07 19:09:52 +00:00
xop-intrinsics-fast-isel.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
xop-intrinsics-x86_64-upgrade.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
xop-intrinsics-x86_64.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
xop-mask-comments.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
xop-pcmov.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
xop-schedule.ll
[X86] Fix VZEROUPPER scheduling info on SNB,HSW,BDW,SXL,SKX.
2018-11-09 09:49:06 +00:00
xor-combine-debugloc.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
xor-icmp.ll
[X86] Only reorder srl/and on last DAG combiner run
2018-02-16 18:51:09 +00:00
xor-select-i1-combine.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
xor.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
xray-attribute-instrumentation.ll
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xray-custom-log.ll
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xray-empty-firstmbb.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
xray-empty-function.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
xray-log-args.ll
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xray-loop-detection.ll
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xray-multiplerets-in-blocks.mir
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xray-section-group.ll
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xray-selective-instrumentation-miss.ll
XRay: Add entry and exit sleds
2016-07-14 04:06:33 +00:00
xray-selective-instrumentation.ll
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xray-tail-call-sled.ll
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xray-typed-event-log.ll
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xtest.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
zero-remat.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
zext-demanded.ll
[X86] Teach X86TargetLowering::targetShrinkDemandedConstant to set non-demanded bits if it helps created an and mask that can be matched as a zero extend.
2018-03-14 16:55:15 +00:00
zext-extract_subreg.ll
…
zext-fold.ll
[x86] shrink 'and' immediate values by setting the high bits (PR35907)
2018-01-19 16:37:25 +00:00
zext-inreg-0.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
zext-inreg-1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
zext-logicop-shift-load.ll
[CodeGenPrepare] Move Extension Instructions Through Logical And Shift Instructions
2018-06-05 21:03:52 +00:00
zext-sext.ll
…
zext-shl.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
zext-trunc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
zlib-longest-match.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00