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GC
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3addr-16bit.ll
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3addr-or.ll
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3dnow-intrinsics.ll
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4char-promote.ll
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2003-08-03-CallArgLiveRanges.ll
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2003-08-23-DeadBlockTest.ll
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2003-11-03-GlobalBool.ll
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2004-02-13-FrameReturnAddress.ll
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2004-02-14-InefficientStackPointer.ll
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2004-02-22-Casts.ll
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2004-03-30-Select-Max.ll
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2004-04-13-FPCMOV-Crash.ll
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2004-06-10-StackifierCrash.ll
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2004-10-08-SelectSetCCFold.ll
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2005-01-17-CycleInDAG.ll
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2005-02-14-IllegalAssembler.ll
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2005-05-08-FPStackifierPHI.ll
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2006-01-19-ISelFoldingBug.ll
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2006-03-01-InstrSchedBug.ll
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2006-03-02-InstrSchedBug.ll
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2006-04-04-CrossBlockCrash.ll
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2006-04-27-ISelFoldingBug.ll
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2006-05-01-SchedCausingSpills.ll
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2006-05-02-InstrSched1.ll
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2006-05-02-InstrSched2.ll
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2006-05-08-CoalesceSubRegClass.ll
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2006-05-08-InstrSched.ll
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2006-05-11-InstrSched.ll
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2006-05-17-VectorArg.ll
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2006-05-22-FPSetEQ.ll
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2006-05-25-CycleInDAG.ll
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2006-07-10-InlineAsmAConstraint.ll
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2006-07-12-InlineAsmQConstraint.ll
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2006-07-20-InlineAsm.ll
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2006-07-28-AsmPrint-Long-As-Pointer.ll
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2006-07-31-SingleRegClass.ll
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2006-08-07-CycleInDAG.ll
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2006-08-16-CycleInDAG.ll
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2006-08-21-ExtraMovInst.ll
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2006-09-01-CycleInDAG.ll
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2006-10-02-BoolRetCrash.ll
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2006-10-09-CycleInDAG.ll
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2006-10-10-FindModifiedNodeSlotBug.ll
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2006-10-12-CycleInDAG.ll
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2006-10-13-CycleInDAG.ll
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2006-10-19-SwitchUnnecessaryBranching.ll
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2006-11-12-CSRetCC.ll
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2006-11-17-IllegalMove.ll
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2006-11-27-SelectLegalize.ll
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2006-12-16-InlineAsmCrash.ll
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2006-12-19-IntelSyntax.ll
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2007-01-08-InstrSched.ll
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2007-01-08-X86-64-Pointer.ll
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2007-01-13-StackPtrIndex.ll
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2007-01-29-InlineAsm-ir.ll
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2007-02-04-OrAddrMode.ll
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2007-02-16-BranchFold.ll
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2007-02-19-LiveIntervalAssert.ll
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2007-02-23-DAGCombine-Miscompile.ll
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2007-02-25-FastCCStack.ll
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2007-03-01-SpillerCrash.ll
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2007-03-15-GEP-Idx-Sink.ll
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2007-03-16-InlineAsm.ll
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2007-03-18-LiveIntervalAssert.ll
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2007-03-24-InlineAsmMultiRegConstraint.ll
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2007-03-24-InlineAsmPModifier.ll
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2007-03-24-InlineAsmVectorOp.ll
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2007-03-24-InlineAsmXConstraint.ll
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2007-03-26-CoalescerBug.ll
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2007-04-08-InlineAsmCrash.ll
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2007-04-11-InlineAsmVectorResult.ll
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2007-04-17-LiveIntervalAssert.ll
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2007-04-24-Huge-Stack.ll
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2007-04-24-VectorCrash.ll
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2007-04-27-InlineAsm-IntMemInput.ll
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2007-05-05-Personality.ll
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2007-05-05-VecCastExpand.ll
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2007-05-14-LiveIntervalAssert.ll
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2007-05-15-maskmovq.ll
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2007-05-17-ShuffleISelBug.ll
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2007-06-04-X86-64-CtorAsmBugs.ll
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2007-06-28-X86-64-isel.ll
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2007-06-29-DAGCombinerBug.ll
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2007-06-29-VecFPConstantCSEBug.ll
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2007-07-03-GR64ToVR64.ll
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2007-07-10-StackerAssert.ll
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2007-07-18-Vector-Extract.ll
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2007-08-01-LiveVariablesBug.ll
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2007-08-09-IllegalX86-64Asm.ll
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2007-08-10-SignExtSubreg.ll
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2007-09-05-InvalidAsm.ll
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2007-09-06-ExtWeakAliasee.ll
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2007-09-27-LDIntrinsics.ll
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2007-10-04-AvoidEFLAGSCopy.ll
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2007-10-12-CoalesceExtSubReg.ll
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2007-10-12-SpillerUnfold1.ll
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2007-10-12-SpillerUnfold2.ll
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2007-10-14-CoalescerCrash.ll
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2007-10-15-CoalescerCrash.ll
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2007-10-16-CoalescerCrash.ll
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2007-10-19-SpillerUnfold.ll
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2007-10-28-inlineasm-q-modifier.ll
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2007-10-29-ExtendSetCC.ll
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2007-10-30-LSRCrash.ll
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2007-10-31-extractelement-i64.ll
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2007-11-01-ISelCrash.ll
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2007-11-03-x86-64-q-constraint.ll
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2007-11-04-LiveIntervalCrash.ll
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2007-11-04-LiveVariablesBug.ll
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2007-11-04-rip-immediate-constant.ll
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2007-11-06-InstrSched.ll
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2007-11-07-MulBy4.ll
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2007-11-30-LoadFolding-Bug.ll
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2007-12-16-BURRSchedCrash.ll
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2007-12-18-LoadCSEBug.ll
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2008-01-08-IllegalCMP.ll
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2008-01-08-SchedulerCrash.ll
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2008-01-09-LongDoubleSin.ll
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2008-01-16-FPStackifierAssert.ll
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2008-01-16-InvalidDAGCombineXform.ll
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2008-02-05-ISelCrash.ll
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2008-02-06-LoadFoldingBug.ll
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2008-02-14-BitMiscompile.ll
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2008-02-18-TailMergingBug.ll
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2008-02-20-InlineAsmClobber.ll
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2008-02-22-LocalRegAllocBug.ll
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2008-02-25-InlineAsmBug.ll
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2008-02-25-X86-64-CoalescerBug.ll
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2008-02-26-AsmDirectMemOp.ll
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2008-02-27-DeadSlotElimBug.ll
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2008-02-27-PEICrash.ll
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2008-03-06-frem-fpstack.ll
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2008-03-07-APIntBug.ll
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2008-03-10-RegAllocInfLoop.ll
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2008-03-12-ThreadLocalAlias.ll
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2008-03-13-TwoAddrPassCrash.ll
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2008-03-14-SpillerCrash.ll
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2008-03-19-DAGCombinerBug.ll
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2008-03-23-DarwinAsmComments.ll
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2008-03-25-TwoAddrPassBug.ll
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2008-03-31-SpillerFoldingBug.ll
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2008-04-02-unnamedEH.ll
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2008-04-08-CoalescerCrash.ll
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2008-04-09-BranchFolding.ll
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2008-04-15-LiveVariableBug.ll
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2008-04-16-CoalescerBug.ll
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2008-04-16-ReMatBug.ll
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2008-04-17-CoalescerBug.ll
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2008-04-24-MemCpyBug.ll
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2008-04-24-pblendw-fold-crash.ll
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2008-04-26-Asm-Optimize-Imm.ll
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2008-04-28-CoalescerBug.ll
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2008-04-28-CyclicSchedUnit.ll
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2008-05-01-InvalidOrdCompare.ll
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2008-05-09-PHIElimBug.ll
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2008-05-09-ShuffleLoweringBug.ll
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2008-05-12-tailmerge-5.ll
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2008-05-21-CoalescerBug.ll
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2008-05-22-FoldUnalignedLoad.ll
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2008-05-28-CoalescerBug.ll
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2008-05-28-LocalRegAllocBug.ll
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2008-06-13-NotVolatileLoadStore.ll
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2008-06-13-VolatileLoadStore.ll
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2008-06-16-SubregsBug.ll
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2008-06-25-VecISelBug.ll
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2008-07-07-DanglingDeadInsts.ll
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2008-07-09-ELFSectionAttributes.ll
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2008-07-11-SHLBy1.ll
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2008-07-16-CoalescerCrash.ll
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2008-07-19-movups-spills.ll
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Make "@name =" mandatory for globals in .ll files.
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2016-05-10 18:22:45 +00:00 |
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2008-07-22-CombinerCrash.ll
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Make "@name =" mandatory for globals in .ll files.
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2016-05-10 18:22:45 +00:00 |
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2008-07-23-VSetCC.ll
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2008-08-06-CmpStride.ll
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2008-08-06-RewriterBug.ll
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2008-08-17-UComiCodeGenBug.ll
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2008-08-23-64Bit-maskmovq.ll
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2008-08-31-EH_RETURN32.ll
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2008-08-31-EH_RETURN64.ll
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2008-09-05-sinttofp-2xi32.ll
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2008-09-09-LinearScanBug.ll
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2008-09-11-CoalescerBug2.ll
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2008-09-11-CoalescerBug.ll
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2008-09-17-inline-asm-1.ll
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2008-09-18-inline-asm-2.ll
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2008-09-19-RegAllocBug.ll
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2008-09-25-sseregparm-1.ll
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2008-09-26-FrameAddrBug.ll
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2008-09-29-ReMatBug.ll
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Make "@name =" mandatory for globals in .ll files.
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2016-05-10 18:22:45 +00:00 |
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2008-09-29-VolatileBug.ll
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2008-10-06-x87ld-nan-1.ll
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2008-10-06-x87ld-nan-2.ll
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2008-10-07-SSEISelBug.ll
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2008-10-11-CallCrash.ll
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2008-10-13-CoalescerBug.ll
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2008-10-16-VecUnaryOp.ll
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2008-10-17-Asm64bitRConstraint.ll
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2008-10-20-AsmDoubleInI32.ll
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2008-10-24-FlippedCompare.ll
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2008-10-27-CoalescerBug.ll
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2008-10-29-ExpandVAARG.ll
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2008-11-03-F80VAARG.ll
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2008-11-06-testb.ll
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2008-11-13-inlineasm-3.ll
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2008-11-29-ULT-Sign.ll
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2008-12-01-loop-iv-used-outside-loop.ll
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2008-12-01-SpillerAssert.ll
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2008-12-02-dagcombine-1.ll
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2008-12-02-dagcombine-2.ll
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2008-12-02-dagcombine-3.ll
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2008-12-02-IllegalResultType.ll
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2008-12-16-dagcombine-4.ll
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2008-12-19-EarlyClobberBug.ll
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2008-12-22-dagcombine-5.ll
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2008-12-23-crazy-address.ll
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2008-12-23-dagcombine-6.ll
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2009-01-13-DoubleUpdate.ll
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2009-01-16-SchedulerBug.ll
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2009-01-16-UIntToFP.ll
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2009-01-18-ConstantExprCrash.ll
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2009-01-25-NoSSE.ll
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2009-01-26-WrongCheck.ll
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2009-01-27-NullStrings.ll
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2009-01-31-BigShift2.ll
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2009-01-31-BigShift3.ll
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2009-01-31-BigShift.ll
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2009-02-01-LargeMask.ll
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2009-02-03-AnalyzedTwice.ll
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2009-02-04-sext-i64-gep.ll
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2009-02-08-CoalescerBug.ll
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2009-02-09-ivs-different-sizes.ll
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2009-02-11-codegenprepare-reuse.ll
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2009-02-12-DebugInfoVLA.ll
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2009-02-12-InlineAsm-nieZ-constraints.ll
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2009-02-12-SpillerBug.ll
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2009-02-21-ExtWeakInitializer.ll
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2009-02-25-CommuteBug.ll
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2009-02-26-MachineLICMBug.ll
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2009-03-03-BitcastLongDouble.ll
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2009-03-03-BTHang.ll
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2009-03-05-burr-list-crash.ll
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Make "@name =" mandatory for globals in .ll files.
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2016-05-10 18:22:45 +00:00 |
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2009-03-07-FPConstSelect.ll
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2009-03-09-APIntCrash.ll
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2009-03-09-SpillerBug.ll
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2009-03-10-CoalescerBug.ll
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2009-03-12-CPAlignBug.ll
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2009-03-13-PHIElimBug.ll
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2009-03-16-PHIElimInLPad.ll
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2009-03-23-i80-fp80.ll
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2009-03-23-LinearScanBug.ll
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2009-03-23-MultiUseSched.ll
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2009-03-25-TestBug.ll
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2009-03-26-NoImplicitFPBug.ll
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2009-04-12-FastIselOverflowCrash.ll
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2009-04-12-picrel.ll
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2009-04-13-2AddrAssert-2.ll
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2009-04-13-2AddrAssert.ll
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2009-04-14-IllegalRegs.ll
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2009-04-16-SpillerUnfold.ll
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2009-04-24.ll
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2009-04-25-CoalescerBug.ll
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2009-04-27-CoalescerAssert.ll
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2009-04-27-LiveIntervalsAssert2.ll
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2009-04-27-LiveIntervalsAssert.ll
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2009-04-29-IndirectDestOperands.ll
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2009-04-29-LinearScanBug.ll
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2009-04-29-RegAllocAssert.ll
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2009-04-scale.ll
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2009-05-08-InlineAsmIOffset.ll
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2009-05-11-tailmerge-crash.ll
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2009-05-19-SingleElementExtractElement.ll
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2009-05-23-available_externally.ll
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2009-05-23-dagcombine-shifts.ll
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2009-05-28-DAGCombineCrash.ll
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2009-05-30-ISelBug.ll
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2009-06-02-RewriterBug.ll
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2009-06-03-Win64DisableRedZone.ll
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2009-06-03-Win64SpillXMM.ll
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2009-06-04-VirtualLiveIn.ll
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2009-06-05-sitofpCrash.ll
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2009-06-05-VariableIndexInsert.ll
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2009-06-05-VZextByteShort.ll
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2009-06-06-ConcatVectors.ll
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2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
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2009-06-15-not-a-tail-call.ll
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2009-06-18-movlp-shuffle-register.ll
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2009-07-06-TwoAddrAssert.ll
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2009-07-07-SplitICmp.ll
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2009-07-09-ExtractBoolFromVector.ll
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2009-07-15-CoalescerBug.ll
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2009-07-16-CoalescerBug.ll
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2009-07-19-AsmExtraOperands.ll
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2009-07-20-CoalescerBug.ll
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2009-07-20-DAGCombineBug.ll
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2009-08-06-branchfolder-crash.ll
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2009-08-06-inlineasm.ll
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2009-08-08-CastError.ll
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2009-08-12-badswitch.ll
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2009-08-14-Win64MemoryIndirectArg.ll
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2009-08-19-LoadNarrowingMiscompile.ll
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2009-08-23-SubRegReuseUndo.ll
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2009-09-10-LoadFoldingBug.ll
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2009-09-10-SpillComments.ll
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2009-09-16-CoalescerBug.ll
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2009-09-19-earlyclobber.ll
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2009-09-21-NoSpillLoopCount.ll
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2009-09-22-CoalescerBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-10-14-LiveVariablesBug.ll
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2009-10-16-Scope.ll
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2009-10-19-atomic-cmp-eflags.ll
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2009-10-19-EmergencySpill.ll
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2009-10-25-RewriterBug.ll
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2009-11-04-SubregCoalescingBug.ll
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2009-11-13-VirtRegRewriterBug.ll
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2009-11-16-MachineLICM.ll
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2009-11-16-UnfoldMemOpBug.ll
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2009-11-17-UpdateTerminator.ll
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2009-11-18-TwoAddrKill.ll
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2009-11-25-ImpDefBug.ll
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2009-12-01-EarlyClobberBug.ll
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2009-12-11-TLSNoRedZone.ll
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2010-01-05-ZExt-Shl.ll
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2010-01-07-ISelBug.ll
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2010-01-08-Atomic64Bug.ll
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2010-01-11-ExtraPHIArg.ll
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2010-01-13-OptExtBug.ll
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2010-01-15-SelectionDAGCycle.ll
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2010-01-18-DbgValue.ll
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2010-01-19-OptExtBug.ll
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2010-02-01-DbgValueCrash.ll
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2010-02-01-TaillCallCrash.ll
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2010-02-03-DualUndef.ll
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2010-02-04-SchedulerBug.ll
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2010-02-11-NonTemporal.ll
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2010-02-12-CoalescerBug-Impdef.ll
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2010-02-15-ImplicitDefBug.ll
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2010-02-19-TailCallRetAddrBug.ll
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2010-02-23-DAGCombineBug.ll
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2010-02-23-DIV8rDefinesAX.ll
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2010-02-23-RematImplicitSubreg.ll
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2010-02-23-SingleDefPhiJoin.ll
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2010-03-04-Mul8Bug.ll
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2010-03-05-ConstantFoldCFG.ll
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2010-03-05-EFLAGS-Redef.ll
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2010-03-17-ISelBug.ll
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2010-04-06-SSEDomainFixCrash.ll
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2010-04-08-CoalescerBug.ll
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2010-04-13-AnalyzeBranchCrash.ll
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2010-04-21-CoalescerBug.ll
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2010-04-29-CoalescerCrash.ll
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2010-04-30-LocalAlloc-LandingPad.ll
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2010-05-03-CoalescerSubRegClobber.ll
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2010-05-05-LocalAllocEarlyClobber.ll
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2010-05-06-LocalInlineAsmClobber.ll
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2010-05-07-ldconvert.ll
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2010-05-10-DAGCombinerBug.ll
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2010-05-12-FastAllocKills.ll
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2010-05-16-nosseconversion.ll
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2010-05-25-DotDebugLoc.ll
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2010-05-26-DotDebugLoc.ll
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2010-05-26-FP_TO_INT-crash.ll
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2010-05-28-Crash.ll
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2010-06-01-DeadArg-DbgInfo.ll
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2010-06-09-FastAllocRegisters.ll
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2010-06-14-fast-isel-fs-load.ll
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2010-06-15-FastAllocEarlyCLobber.ll
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2010-06-24-g-constraint-crash.ll
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2010-06-25-asm-RA-crash.ll
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2010-06-25-CoalescerSubRegDefDead.ll
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2010-06-28-FastAllocTiedOperand.ll
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2010-06-28-matched-g-constraint.ll
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2010-07-02-asm-alignstack.ll
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2010-07-02-UnfoldBug.ll
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2010-07-06-asm-RIP.ll
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2010-07-06-DbgCrash.ll
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2010-07-11-FPStackLoneUse.ll
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2010-07-13-indirectXconstraint.ll
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2010-07-15-Crash.ll
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2010-07-29-SetccSimplify.ll
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2010-08-04-MaskedSignedCompare.ll
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2010-08-04-MingWCrash.ll
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2010-08-04-StackVariable.ll
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2010-09-01-RemoveCopyByCommutingDef.ll
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2010-09-16-asmcrash.ll
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2010-09-16-EmptyFilename.ll
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2010-09-17-SideEffectsInChain.ll
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2010-09-30-CMOV-JumpTable-PHI.ll
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2010-10-08-cmpxchg8b.ll
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2010-11-02-DbgParameter.ll
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2010-11-09-MOVLPS.ll
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2010-11-18-SelectOfExtload.ll
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2011-01-07-LegalizeTypesCrash.ll
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2011-01-10-DagCombineHang.ll
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2011-01-24-DbgValue-Before-Use.ll
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2011-02-04-FastRegallocNoFP.ll
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2011-02-12-shuffle.ll
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2011-02-21-VirtRegRewriter-KillSubReg.ll
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2011-02-23-UnfoldBug.ll
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2011-02-27-Fpextend.ll
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2011-03-02-DAGCombiner.ll
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2011-03-08-Sched-crash.ll
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2011-03-09-Physreg-Coalescing.ll
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2011-03-30-CreateFixedObjCrash.ll
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2011-04-13-SchedCmpJmp.ll
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2011-04-19-sclr-bb.ll
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2011-05-09-loaduse.ll
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2011-05-26-UnreachableBlockElim.ll
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2011-05-27-CrossClassCoalescing.ll
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2011-06-01-fildll.ll
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2011-06-03-x87chain.ll
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2011-06-06-fgetsign80bit.ll
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2011-06-12-FastAllocSpill.ll
|
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2011-06-14-mmx-inlineasm.ll
|
|
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|
2011-06-14-PreschedRegalias.ll
|
[X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
|
2016-05-07 01:11:17 +00:00 |
|
2011-06-19-QuicksortCoalescerBug.ll
|
|
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|
2011-07-13-BadFrameIndexDisplacement.ll
|
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2011-08-23-PerformSubCombine128.ll
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2011-08-23-Trampoline.ll
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2011-08-29-BlockConstant.ll
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2011-08-29-InitOrder.ll
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2011-09-14-valcoalesce.ll
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2011-09-18-sse2cmp.ll
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2011-09-21-setcc-bug.ll
|
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2011-10-11-SpillDead.ll
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2011-10-11-srl.ll
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2011-10-12-MachineCSE.ll
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2011-10-18-FastISel-VectorParams.ll
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|
2011-10-19-LegelizeLoad.ll
|
|
|
|
2011-10-19-widen_vselect.ll
|
|
|
|
2011-10-21-widen-cmp.ll
|
[x86] avoid printing unnecessary sign bits of hex immediates in asm comments (PR20347)
|
2016-05-28 14:58:37 +00:00 |
|
2011-10-27-tstore.ll
|
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|
2011-10-30-padd.ll
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2011-11-07-LegalizeBuildVector.ll
|
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2011-11-22-AVX2-Domains.ll
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2011-11-30-or.ll
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2011-12-8-bitcastintprom.ll
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2011-12-06-AVXVectorExtractCombine.ll
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2011-12-06-BitcastVectorGlobal.ll
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2011-12-08-AVXISelBugs.ll
|
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2011-12-15-vec_shift.ll
|
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2011-12-26-extractelement-duplicate-load.ll
|
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|
2011-12-28-vselecti8.ll
|
|
|
|
2011-20-21-zext-ui2fp.ll
|
|
|
|
2012-1-10-buildvector.ll
|
[X86] No need to avoid selecting AVX_SET0 for 256-bit integer types when only AVX1 is supported. AVX_SET0 just expands to 256-bit VXORPS which is legal in AVX1.
|
2016-05-08 07:10:47 +00:00 |
|
2012-01-10-UndefExceptionEdge.ll
|
|
|
|
2012-01-11-split-cv.ll
|
regenerate checks
|
2016-05-11 21:51:28 +00:00 |
|
2012-01-12-extract-sv.ll
|
[X86] No need to avoid selecting AVX_SET0 for 256-bit integer types when only AVX1 is supported. AVX_SET0 just expands to 256-bit VXORPS which is legal in AVX1.
|
2016-05-08 07:10:47 +00:00 |
|
2012-01-16-mfence-nosse-flags.ll
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|
2012-01-18-vbitcast.ll
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|
2012-02-12-dagco.ll
|
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|
2012-02-14-scalar.ll
|
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|
2012-02-23-mmx-inlineasm.ll
|
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|
2012-02-29-CoalescerBug.ll
|
|
|
|
2012-03-15-build_vector_wl.ll
|
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|
2012-03-20-LargeConstantExpr.ll
|
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|
2012-03-26-PostRALICMBug.ll
|
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|
2012-04-09-TwoAddrPassBug.ll
|
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|
2012-04-26-sdglue.ll
|
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|
2012-05-17-TwoAddressBug.ll
|
|
|
|
2012-05-19-CoalescerCrash.ll
|
|
|
|
2012-07-10-extload64.ll
|
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|
2012-07-10-shufnorm.ll
|
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|
2012-07-15-broadcastfold.ll
|
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2012-07-15-BuildVectorPromote.ll
|
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2012-07-15-tconst_shl.ll
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2012-07-15-vshl.ll
|
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2012-07-16-fp2ui-i1.ll
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2012-07-16-LeaUndef.ll
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2012-07-17-vtrunc.ll
|
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|
2012-07-23-select_cc.ll
|
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|
2012-08-07-CmpISelBug.ll
|
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|
2012-08-16-setcc.ll
|
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|
2012-08-17-legalizer-crash.ll
|
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|
2012-08-28-UnsafeMathCrash.ll
|
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2012-09-13-dagco-fneg.ll
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2012-09-28-CGPBug.ll
|
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2012-10-02-DAGCycle.ll
|
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2012-10-03-DAGCycle.ll
|
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|
2012-10-18-crash-dagco.ll
|
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2012-11-28-merge-store-alias.ll
|
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2012-11-30-handlemove-dbg.ll
|
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2012-11-30-misched-dbg.ll
|
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2012-11-30-regpres-dbg.ll
|
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|
2012-12-1-merge-multiple.ll
|
|
|
|
2012-12-06-python27-miscompile.ll
|
|
|
|
2012-12-12-DAGCombineCrash.ll
|
|
|
|
2012-12-14-v8fp80-crash.ll
|
|
|
|
2012-12-19-NoImplicitFloat.ll
|
|
|
|
2013-01-09-DAGCombineBug.ll
|
|
|
|
2013-03-13-VEX-DestReg.ll
|
|
|
|
2013-05-06-ConactVectorCrash.ll
|
|
|
|
2013-10-14-FastISel-incorrect-vreg.ll
|
|
|
|
2014-05-29-factorial.ll
|
|
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|
2014-08-29-CompactUnwind.ll
|
|
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|
9601.ll
|
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|
20090313-signext.ll
|
|
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|
abi-isel.ll
|
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|
add32ri8.ll
|
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|
add_shl_constant.ll
|
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|
add-nsw-sext.ll
|
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|
add-of-carry.ll
|
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add.ll
|
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adde-carry.ll
|
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addr-label-difference.ll
|
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|
addr-mode-matcher.ll
|
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|
address-type-promotion-constantexpr.ll
|
|
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|
adx-intrinsics.ll
|
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aes_intrinsics.ll
|
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|
alias-gep.ll
|
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|
aliases.ll
|
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aligned-comm.ll
|
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aligned-variadic.ll
|
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alignment-2.ll
|
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|
alignment.ll
|
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|
all-ones-vector.ll
|
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|
alldiv-divdi3.ll
|
|
|
|
alloca-align-rounding-32.ll
|
|
|
|
alloca-align-rounding.ll
|
|
|
|
allrem-moddi3.ll
|
|
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|
and-encoding.ll
|
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|
and-load-fold.ll
|
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|
and-or-fold.ll
|
|
|
|
and-su.ll
|
|
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|
andimm8.ll
|
|
|
|
anyext.ll
|
[X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
|
2016-05-07 01:11:17 +00:00 |
|
anyregcc-crash.ll
|
|
|
|
anyregcc.ll
|
|
|
|
apm.ll
|
|
|
|
AppendingLinkage.ll
|
Fail early on unknown appending linkage variables.
|
2016-05-16 21:14:24 +00:00 |
|
arg-cast.ll
|
|
|
|
asm-block-labels.ll
|
|
|
|
asm-global-imm.ll
|
|
|
|
asm-indirect-mem.ll
|
|
|
|
asm-invalid-register-class-crasher.ll
|
|
|
|
asm-label2.ll
|
|
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|
asm-label.ll
|
|
|
|
asm-mismatched-types.ll
|
|
|
|
asm-modifier-P.ll
|
|
|
|
asm-modifier.ll
|
|
|
|
asm-reg-type-mismatch.ll
|
|
|
|
asm-reject-reg-type-mismatch.ll
|
Fix an assert in SelectionDAGBuilder when processing inline asm
|
2016-05-17 19:52:01 +00:00 |
|
atom-bypass-slow-division-64.ll
|
|
|
|
atom-bypass-slow-division.ll
|
|
|
|
atom-call-reg-indirect-foldedreload32.ll
|
|
|
|
atom-call-reg-indirect-foldedreload64.ll
|
|
|
|
atom-call-reg-indirect.ll
|
|
|
|
atom-cmpb.ll
|
|
|
|
atom-fixup-lea1.ll
|
|
|
|
atom-fixup-lea2.ll
|
|
|
|
atom-fixup-lea3.ll
|
|
|
|
atom-fixup-lea4.ll
|
|
|
|
atom-lea-addw-bug.ll
|
|
|
|
atom-lea-sp.ll
|
|
|
|
atom-pad-short-functions.ll
|
|
|
|
atom-sched.ll
|
|
|
|
atom-shuf.ll
|
|
|
|
atomic8.ll
|
|
|
|
atomic16.ll
|
|
|
|
atomic32.ll
|
|
|
|
atomic64.ll
|
|
|
|
atomic128.ll
|
|
|
|
atomic6432.ll
|
|
|
|
atomic_add.ll
|
|
|
|
atomic_idempotent.ll
|
|
|
|
atomic_mi.ll
|
|
|
|
atomic_op.ll
|
|
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|
atomic-dagsched.ll
|
|
|
|
atomic-eflags-reuse.ll
|
|
|
|
atomic-flags.ll
|
|
|
|
atomic-load-store-wide.ll
|
|
|
|
atomic-load-store.ll
|
|
|
|
atomic-minmax-i6432.ll
|
|
|
|
atomic-non-integer.ll
|
|
|
|
atomic-ops-ancient-64.ll
|
|
|
|
atomic-or.ll
|
|
|
|
atomic-pointer.ll
|
|
|
|
Atomics-64.ll
|
|
|
|
attribute-sections.ll
|
|
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|
avg.ll
|
|
|
|
avoid_complex_am.ll
|
|
|
|
avoid-lea-scale2.ll
|
|
|
|
avoid-loop-align-2.ll
|
|
|
|
avoid-loop-align.ll
|
|
|
|
avx1-logical-load-folding.ll
|
|
|
|
avx2-arith.ll
|
|
|
|
avx2-cmp.ll
|
|
|
|
avx2-conversions.ll
|
|
|
|
avx2-gather.ll
|
|
|
|
avx2-intrinsics-fast-isel.ll
|
[X86][SSE] (Reapplied) Replace (V)PMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (llvm)
|
2016-05-28 18:03:41 +00:00 |
|
avx2-intrinsics-x86-upgrade.ll
|
[X86] Remove SSE/AVX unaligned store intrinsics as clang no longer uses them. Auto upgrade to native unaligned store instructions.
|
2016-05-30 23:15:56 +00:00 |
|
avx2-intrinsics-x86.ll
|
[X86] Remove SSE/AVX unaligned store intrinsics as clang no longer uses them. Auto upgrade to native unaligned store instructions.
|
2016-05-30 23:15:56 +00:00 |
|
avx2-logic.ll
|
|
|
|
avx2-nontemporal.ll
|
[X86][AVX2] Relaxed alignment on nontemporal store tests
|
2016-06-03 10:06:59 +00:00 |
|
avx2-phaddsub.ll
|
|
|
|
avx2-pmovxrm.ll
|
[X86][SSE] Renamed pmovxrm tests
|
2016-05-30 19:14:37 +00:00 |
|
avx2-shift.ll
|
|
|
|
avx2-vbroadcast.ll
|
|
|
|
avx2-vector-shifts.ll
|
[X86][AVX2] Fix v16i16 SHL lowering (PR27730)
|
2016-06-04 16:45:33 +00:00 |
|
avx2-vperm.ll
|
|
|
|
avx512-any_extend_load.ll
|
[AVX512] Implement missing patterns for any_extend load lowering.
|
2016-05-22 10:21:04 +00:00 |
|
avx512-arith.ll
|
[AVX512] Add VLX 128/256-bit SET0 operations that encode to 128/256-bit EVEX encoded VPXORD so all 32 registers can be used.
|
2016-05-08 21:33:53 +00:00 |
|
avx512-bugfix-23634.ll
|
|
|
|
avx512-bugfix-25270.ll
|
|
|
|
avx512-bugfix-26264.ll
|
|
|
|
avx512-build-vector.ll
|
|
|
|
avx512-calling-conv.ll
|
[AVX512] Add VLX 128/256-bit SET0 operations that encode to 128/256-bit EVEX encoded VPXORD so all 32 registers can be used.
|
2016-05-08 21:33:53 +00:00 |
|
avx512-cmp.ll
|
[x86] avoid printing unnecessary sign bits of hex immediates in asm comments (PR20347)
|
2016-05-28 14:58:37 +00:00 |
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avx512-cvt.ll
|
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avx512-ext.ll
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|
avx512-extract-subvector.ll
|
[AVX512] Add patterns to implement stores of extracts of least signficant subvectors using XMM or YMM stores instead of the vector extract instructions.
|
2016-05-22 23:44:33 +00:00 |
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avx512-fma-intrinsics.ll
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avx512-fma.ll
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avx512-gather-scatter-intrin.ll
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avx512-i1test.ll
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avx512-inc-dec.ll
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avx512-insert-extract.ll
|
[AVX512] Add patterns for VEXTRACT v16i16->v8i16 and v32i8->v16i8. Disable AVX2 versions of vector extract when AVX512VL is enabled.
|
2016-05-21 07:08:56 +00:00 |
|
avx512-intel-ocl.ll
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|
|
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avx512-intrinsics-upgrade.ll
|
[AVX512] Remove masked load intrinsics. Clang now emits generic masked load intrinsics instead.
|
2016-06-02 04:19:36 +00:00 |
|
avx512-intrinsics.ll
|
[AVX512] Remove masked_move/blendm intrinsic from back-end.
|
2016-06-09 11:46:55 +00:00 |
|
avx512-logic.ll
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|
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avx512-mask-bugfix.ll
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avx512-mask-op.ll
|
[X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
|
2016-05-07 01:11:17 +00:00 |
|
avx512-mask-spills.ll
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avx512-mov.ll
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avx512-nontemporal.ll
|
[AVX512] Add non-temporal store patterns for v16i32/v32i16/v64i8.
|
2016-05-08 23:43:17 +00:00 |
|
avx512-round.ll
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avx512-scalar.ll
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avx512-scalarIntrinsics.ll
|
[Clang][AVX512][intrinsics] Fix rcp and sqrt intrinsics.
|
2016-05-21 14:44:18 +00:00 |
|
avx512-select.ll
|
[X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
|
2016-05-07 01:11:17 +00:00 |
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avx512-shift.ll
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avx512-skx-insert-subvec.ll
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avx512-trunc.ll
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avx512-unsafe-fp-math.ll
|
[AVX512] Add support for commutative MAX/MIN . In general VMAX{PS,PD} and VMIN{PS,PD} instruction are not commutative . In combine pass only if UnsafeFPMath are used VMAX/VMAX are converted to commutative nodes VMAXC/VMAXC.
|
2016-05-03 11:51:45 +00:00 |
|
avx512-vbroadcast.ll
|
Change AVX512 braodcastsd/ss patterns interaction with spilling . New implementation take a scalar register and generate a vector without COPY_TO_REGCLASS (turn it into a VR128 register ) .The issue is that during register allocation we may spill a scalar value using 128-bit loads and stores, wasting cache bandwidth.
|
2016-05-01 08:40:00 +00:00 |
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avx512-vec-cmp.ll
|
[X86] Add a common check-prefix to both run lines on a test so identical checks appear just once.
|
2016-05-22 00:39:33 +00:00 |
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avx512-vselect-crash.ll
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avx512bw-arith.ll
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avx512bw-intrinsics-upgrade.ll
|
[X86][AVX512] Added avx512 VPSLLDQ/VPSRLDQ instruction comments
|
2016-06-09 22:03:15 +00:00 |
|
avx512bw-intrinsics.ll
|
[X86][AVX512] Dropped avx512 VPSLLDQ/VPSRLDQ intrinsics
|
2016-06-09 21:09:03 +00:00 |
|
avx512bw-mask-op.ll
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avx512bw-mov.ll
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avx512bw-vec-cmp.ll
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avx512bwvl-arith.ll
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avx512bwvl-intrinsics-upgrade.ll
|
[X86] Fix a test I failed to re-generate in r272249.
|
2016-06-09 07:10:34 +00:00 |
|
avx512bwvl-intrinsics.ll
|
[AVX512] Remove masked_move/blendm intrinsic from back-end.
|
2016-06-09 11:46:55 +00:00 |
|
avx512bwvl-mov.ll
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avx512bwvl-vec-cmp.ll
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avx512cd-intrinsics.ll
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avx512cdvl-intrinsics.ll
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avx512dq-intrinsics.ll
|
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|
avx512dq-mask-op.ll
|
[X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
|
2016-05-07 01:11:17 +00:00 |
|
avx512dqvl-intrinsics.ll
|
Fix intrinsic vbroadcast{i32|f32}x2 lowering.
|
2016-05-31 07:43:39 +00:00 |
|
avx512er-intrinsics.ll
|
|
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avx512ifma-intrinsics.ll
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|
avx512ifmavl-intrinsics.ll
|
[X86] Re-generate tests using update_llc_test_checks.py to prepare for a future commit. NFC
|
2016-05-08 21:33:47 +00:00 |
|
avx512vbmi-intrinsics.ll
|
[llvm][AVX512][intrinsics] Fix vperm{b|w|d|q|ps|pd} intrinsics. Index is second argument to buildin function but it is first instruction operand.
|
2016-05-24 11:06:22 +00:00 |
|
avx512vbmivl-intrinsics.ll
|
[llvm][AVX512][intrinsics] Fix vperm{b|w|d|q|ps|pd} intrinsics. Index is second argument to buildin function but it is first instruction operand.
|
2016-05-24 11:06:22 +00:00 |
|
avx512vl-arith.ll
|
|
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|
avx512vl-intrinsics-upgrade.ll
|
[AVX512] Remove masked load intrinsics. Clang now emits generic masked load intrinsics instead.
|
2016-06-02 04:19:36 +00:00 |
|
avx512vl-intrinsics.ll
|
[AVX512] Remove masked_move/blendm intrinsic from back-end.
|
2016-06-09 11:46:55 +00:00 |
|
avx512vl-logic.ll
|
[AVX512] Fix PANDN combining for v4i32/v8i32 when VLX is enabled.
|
2016-06-05 05:35:11 +00:00 |
|
avx512vl-mov.ll
|
|
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|
avx512vl-nontemporal.ll
|
|
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|
avx512vl-vbroadcast.ll
|
[AVX512] Add VLX 128/256-bit SET0 operations that encode to 128/256-bit EVEX encoded VPXORD so all 32 registers can be used.
|
2016-05-08 21:33:53 +00:00 |
|
avx512vl-vec-cmp.ll
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|
avx-arith.ll
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|
avx-basic.ll
|
[X86] Lower 256-bit vector all-zero constants to v8i32 even with AVX1 only. Either way a 256-bit VXORPS will be used.
|
2016-05-08 07:10:54 +00:00 |
|
avx-bitcast.ll
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avx-brcond.ll
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avx-cast.ll
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avx-cmp.ll
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avx-cvt-2.ll
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avx-cvt.ll
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avx-fp2int.ll
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|
avx-insertelt.ll
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|
avx-intel-ocl.ll
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|
avx-intrinsics-fast-isel.ll
|
[X86][SSE] Replace (V)CVTTPS2DQ and VCVTTPD2DQ truncating (round to zero) f32/f64 to i32 with generic IR (llvm)
|
2016-06-02 10:55:21 +00:00 |
|
avx-intrinsics-x86_64.ll
|
[X86] Run the AVX/AVX2 intrinsic tests in AVX512VL mode too just to make sure we don't break any older intrinsics.
|
2016-05-20 05:10:32 +00:00 |
|
avx-intrinsics-x86-upgrade.ll
|
[X86][SSE] Replace (V)CVTTPS2DQ and VCVTTPD2DQ truncating (round to zero) f32/f64 to i32 with generic IR (llvm)
|
2016-06-02 10:55:21 +00:00 |
|
avx-intrinsics-x86.ll
|
[X86][SSE] Replace (V)CVTTPS2DQ and VCVTTPD2DQ truncating (round to zero) f32/f64 to i32 with generic IR (llvm)
|
2016-06-02 10:55:21 +00:00 |
|
avx-isa-check.ll
|
Change AVX512 braodcastsd/ss patterns interaction with spilling . New implementation take a scalar register and generate a vector without COPY_TO_REGCLASS (turn it into a VR128 register ) .The issue is that during register allocation we may spill a scalar value using 128-bit loads and stores, wasting cache bandwidth.
|
2016-05-01 08:40:00 +00:00 |
|
avx-load-store.ll
|
|
|
|
avx-logic.ll
|
|
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|
avx-minmax.ll
|
|
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|
avx-select.ll
|
[X86] No need to avoid selecting AVX_SET0 for 256-bit integer types when only AVX1 is supported. AVX_SET0 just expands to 256-bit VXORPS which is legal in AVX1.
|
2016-05-08 07:10:47 +00:00 |
|
avx-shift.ll
|
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|
avx-shuffle-x86_32.ll
|
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|
avx-splat.ll
|
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|
avx-trunc.ll
|
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|
avx-unpack.ll
|
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|
avx-varargs-x86_64.ll
|
|
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|
avx-vbroadcast.ll
|
|
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|
avx-vextractf128.ll
|
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|
avx-vinsertf128.ll
|
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|
avx-vperm2x128.ll
|
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|
avx-vzeroupper.ll
|
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|
avx-win64-args.ll
|
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|
avx-win64.ll
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|
avx.ll
|
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|
barrier-sse.ll
|
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|
barrier.ll
|
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|
base-pointer-and-cmpxchg.ll
|
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|
basic-promote-integers.ll
|
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|
bc-extract.ll
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|
bigstructret2.ll
|
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|
bigstructret.ll
|
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|
bit-piece-comment.ll
|
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|
bit-test-shift.ll
|
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|
bitcast2.ll
|
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|
bitcast-i256.ll
|
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|
bitcast-int-to-vector.ll
|
|
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|
bitcast-mmx.ll
|
|
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|
bitcast.ll
|
|
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|
bitreverse.ll
|
[x86] avoid printing unnecessary sign bits of hex immediates in asm comments (PR20347)
|
2016-05-28 14:58:37 +00:00 |
|
bitscan.ll
|
Adding back-end support to two bit scanning intrinsics
|
2016-06-01 12:02:37 +00:00 |
|
block-placement.ll
|
Revive http://reviews.llvm.org/D12778 to handle forward-hot-prob and backward-hot-prob consistently.
|
2016-06-08 21:30:12 +00:00 |
|
bmi.ll
|
[x86, BMI] add TLI hook for 'andn' and use it to simplify comparisons
|
2016-05-07 15:03:40 +00:00 |
|
bool-simplify.ll
|
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|
bool-zext.ll
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|
br-fold.ll
|
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|
branchfolding-catchpads.ll
|
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|
branchfolding-landingpads.ll
|
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brcond.ll
|
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|
break-anti-dependencies.ll
|
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|
break-false-dep.ll
|
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|
bss_pagealigned.ll
|
|
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|
bswap-inline-asm.ll
|
|
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|
bswap-vector.ll
|
[X86][SSE] Regenerate vector bswap tests
|
2016-05-04 15:45:48 +00:00 |
|
bswap.ll
|
|
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|
bt.ll
|
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btq.ll
|
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|
buildvec-insertvec.ll
|
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|
byval2.ll
|
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byval3.ll
|
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byval4.ll
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byval5.ll
|
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byval6.ll
|
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byval7.ll
|
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byval-align.ll
|
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|
byval-callee-cleanup.ll
|
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byval.ll
|
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|
cache-intrinsic.ll
|
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|
call-imm.ll
|
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call-push.ll
|
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cas.ll
|
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catch.ll
|
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|
catchpad-dynamic-alloca.ll
|
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|
catchpad-lifetime.ll
|
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catchpad-realign-savexmm.ll
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catchpad-regmask.ll
|
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catchpad-weight.ll
|
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|
catchret-empty-fallthrough.ll
|
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catchret-fallthrough.ll
|
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|
catchret-regmask.ll
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|
cfi.ll
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|
cfstring.ll
|
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chain_order.ll
|
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|
change-compare-stride-1.ll
|
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|
change-compare-stride-trickiness-0.ll
|
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|
change-compare-stride-trickiness-1.ll
|
|
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|
change-compare-stride-trickiness-2.ll
|
|
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|
cleanuppad-inalloca.ll
|
Re-commit r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions"
|
2016-05-18 16:10:17 +00:00 |
|
cleanuppad-large-codemodel.ll
|
|
|
|
cleanuppad-realign.ll
|
|
|
|
clear_upper_vector_element_bits.ll
|
[X86][SSE] Improved blend+zero target shuffle combining to use combined shuffle mask directly
|
2016-06-07 12:20:14 +00:00 |
|
clobber-fi0.ll
|
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|
clz.ll
|
|
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|
cmov-double.ll
|
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|
cmov-fp.ll
|
|
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|
cmov-into-branch.ll
|
[CGP] avoid crashing from weightlessness
|
2016-05-09 17:31:55 +00:00 |
|
cmov.ll
|
|
|
|
cmovcmov.ll
|
[X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
|
2016-05-07 01:11:17 +00:00 |
|
cmp-fast-isel.ll
|
|
|
|
cmp.ll
|
|
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|
cmpxchg16b.ll
|
|
|
|
cmpxchg-clobber-flags.ll
|
[MachineBasicBlock] Take advantage of the partially dead information.
|
2016-04-26 23:14:29 +00:00 |
|
cmpxchg-i1.ll
|
|
|
|
cmpxchg-i128-i1.ll
|
|
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|
coal-sections.ll
|
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|
coalesce_commute_subreg.ll
|
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|
coalesce-esp.ll
|
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|
coalesce-implicitdef.ll
|
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|
coalescer-commute1.ll
|
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coalescer-commute2.ll
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coalescer-commute3.ll
|
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coalescer-commute4.ll
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coalescer-commute5.ll
|
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coalescer-cross.ll
|
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coalescer-dce2.ll
|
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coalescer-dce.ll
|
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coalescer-identity.ll
|
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|
coalescer-remat.ll
|
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|
coalescer-subreg.ll
|
|
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|
coalescer-win64.ll
|
|
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|
code_placement_align_all.ll
|
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|
code_placement_cold_loop_blocks.ll
|
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|
code_placement_eh.ll
|
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|
code_placement_ignore_succ_in_inner_loop.ll
|
|
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|
code_placement_loop_rotation2.ll
|
|
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|
code_placement_loop_rotation3.ll
|
minor test clean up /NFC
|
2016-05-12 16:41:27 +00:00 |
|
code_placement_loop_rotation.ll
|
|
|
|
code_placement_outline_optional_branches.ll
|
|
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|
code_placement.ll
|
|
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|
codegen-prepare-addrmode-sext.ll
|
|
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|
codegen-prepare-cast.ll
|
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|
codegen-prepare-crash.ll
|
|
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|
codegen-prepare-extload.ll
|
|
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|
codegen-prepare.ll
|
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|
codemodel.ll
|
|
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|
coff-comdat2.ll
|
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|
coff-comdat3.ll
|
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|
coff-comdat.ll
|
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|
coff-feat00.ll
|
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coff-weak.ll
|
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coldcc64.ll
|
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|
combine-64bit-vec-binop.ll
|
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|
combine-and.ll
|
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|
combine-avx2-intrinsics.ll
|
|
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|
combine-avx-intrinsics.ll
|
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combine-lds.ll
|
|
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|
combine-multiplies.ll
|
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|
combine-or.ll
|
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|
combine-sse41-intrinsics.ll
|
|
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|
combine-testm-and.ll
|
|
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|
combiner-aa-0.ll
|
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|
combiner-aa-1.ll
|
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|
commute-blend-avx2.ll
|
|
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|
commute-blend-sse41.ll
|
|
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|
commute-clmul.ll
|
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|
commute-fcmp.ll
|
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|
commute-intrinsic.ll
|
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commute-two-addr.ll
|
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commute-xop.ll
|
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|
commuted-blend-mask.ll
|
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compact-unwind.ll
|
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compare_folding.ll
|
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compare-add.ll
|
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compare-inf.ll
|
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|
compiler_used.ll
|
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|
complex-asm.ll
|
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|
complex-fca.ll
|
|
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|
computeKnownBits_urem.ll
|
|
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|
conditional-indecrement.ll
|
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|
const-base-addr.ll
|
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|
constant-combines.ll
|
|
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|
constant-hoisting-and.ll
|
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|
constant-hoisting-cmp.ll
|
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|
constant-hoisting-optnone.ll
|
|
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|
constant-hoisting-shift-immediate.ll
|
|
|
|
constant-pool-remat-0.ll
|
|
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|
constant-pool-sharing.ll
|
|
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|
constpool.ll
|
|
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|
constructor.ll
|
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|
convert-2-addr-3-addr-inc64.ll
|
|
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|
copy-eflags.ll
|
|
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|
copy-propagation.ll
|
|
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|
copysign-constant-magnitude.ll
|
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cpus.ll
|
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|
crash-nosse.ll
|
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crash-O0.ll
|
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crash.ll
|
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critical-anti-dep-breaker.ll
|
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critical-edge-split-2.ll
|
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cse-add-with-overflow.ll
|
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cstring.ll
|
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ctpop-combine.ll
|
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|
cvt16.ll
|
|
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|
cvtv2f32.ll
|
|
|
|
cxx_tlscc64.ll
|
[X86] Fix the lowering of TLS calls.
|
2016-04-27 21:37:37 +00:00 |
|
dag-fmf-cse.ll
|
|
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|
dag-merge-fast-accesses.ll
|
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dag-optnone.ll
|
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dag-rauw-cse.ll
|
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dagcombine-and-setcc.ll
|
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dagcombine-buildvector.ll
|
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dagcombine-cse.ll
|
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dagcombine-shifts.ll
|
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dagcombine-unsafe-math.ll
|
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darwin-bzero.ll
|
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darwin-no-dead-strip.ll
|
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darwin-quote.ll
|
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darwin-stub.ll
|
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darwin-tls.ll
|
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dbg-changes-codegen-branch-folding.ll
|
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dbg-changes-codegen.ll
|
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dbg-combine.ll
|
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|
DbgValueOtherTargets.test
|
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|
debugloc-argsize.ll
|
|
|
|
deopt-bundles.ll
|
|
|
|
deopt-intrinsic-cconv.ll
|
All llvm.deoptimize declarations must use the same calling convention
|
2016-05-12 01:17:38 +00:00 |
|
deopt-intrinsic.ll
|
All llvm.deoptimize declarations must use the same calling convention
|
2016-05-12 01:17:38 +00:00 |
|
disable-tail-calls.ll
|
|
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|
discontiguous-loops.ll
|
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div8.ll
|
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divide-by-constant.ll
|
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divrem8_ext.ll
|
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|
divrem.ll
|
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|
dllexport-x86_64.ll
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dllexport.ll
|
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|
dllimport-x86_64.ll
|
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dllimport.ll
|
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dollar-name.ll
|
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dont-trunc-store-double-to-float.ll
|
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dwarf-comp-dir.ll
|
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dwarf-eh-prepare.ll
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|
dyn_alloca_aligned.ll
|
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|
dyn-stackalloc.ll
|
|
|
|
dynamic-alloca-in-entry.ll
|
Re-commit r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions"
|
2016-05-18 16:10:17 +00:00 |
|
dynamic-alloca-lifetime.ll
|
|
|
|
dynamic-allocas-VLAs.ll
|
|
|
|
early-ifcvt-crash.ll
|
|
|
|
early-ifcvt.ll
|
|
|
|
eflags-copy-expansion.mir
|
[X86] Properly check that EAX is dead when copying EFLAGS.
|
2016-05-10 20:49:46 +00:00 |
|
eh_frame.ll
|
|
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|
eh-label.ll
|
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eh-nolandingpads.ll
|
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eh-null-personality.ll
|
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elf-comdat2.ll
|
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elf-comdat.ll
|
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emit-big-cst.ll
|
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empty-functions.ll
|
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empty-struct-return-type.ll
|
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|
emutls_generic.ll
|
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|
emutls-pic.ll
|
|
|
|
emutls-pie.ll
|
Differential Revision: http://reviews.llvm.org/D19733
|
2016-04-29 21:19:16 +00:00 |
|
emutls.ll
|
|
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|
epilogue.ll
|
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|
equiv_with_fndef.ll
|
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equiv_with_vardef.ll
|
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exception-label.ll
|
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exedeps-movq.ll
|
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exedepsfix-broadcast.ll
|
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expand-opaque-const.ll
|
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|
expand-vr64-gr64-copy.mir
|
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extend.ll
|
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|
extended-fma-contraction.ll
|
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extern_weak.ll
|
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extmul64.ll
|
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extmul128.ll
|
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extract-combine.ll
|
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extract-concat.ll
|
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extract-extract.ll
|
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|
extract-store.ll
|
|
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|
extractelement-from-arg.ll
|
|
|
|
extractelement-index.ll
|
[X86][SSE] Added extra i8 extract element test
|
2016-05-22 20:35:42 +00:00 |
|
extractelement-legalization-cycle.ll
|
|
|
|
extractelement-legalization-store-ordering.ll
|
|
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|
extractelement-load.ll
|
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|
extractelement-shuffle.ll
|
|
|
|
extractps.ll
|
Make "@name =" mandatory for globals in .ll files.
|
2016-05-10 18:22:45 +00:00 |
|
f16c-intrinsics-fast-isel.ll
|
[X86][F16C] Added F16C fast-isel tests to match clang/test/CodeGen/f16c-builtins.c
|
2016-05-26 10:26:56 +00:00 |
|
f16c-intrinsics.ll
|
|
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|
fabs.ll
|
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fadd-combines.ll
|
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fast-cc-callee-pops.ll
|
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fast-cc-merge-stack-adj.ll
|
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fast-cc-pass-in-regs.ll
|
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fast-isel-agg-constant.ll
|
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fast-isel-args-fail2.ll
|
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fast-isel-args-fail.ll
|
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fast-isel-args.ll
|
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fast-isel-atomic.ll
|
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fast-isel-avoid-unnecessary-pic-base.ll
|
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fast-isel-bail.ll
|
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fast-isel-bc.ll
|
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fast-isel-bitcasts-avx.ll
|
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fast-isel-bitcasts.ll
|
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fast-isel-branch_weights.ll
|
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fast-isel-call-bool.ll
|
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|
fast-isel-call.ll
|
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|
fast-isel-cmp-branch2.ll
|
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|
fast-isel-cmp-branch3.ll
|
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|
fast-isel-cmp-branch.ll
|
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fast-isel-cmp.ll
|
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fast-isel-constant.ll
|
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|
fast-isel-constpool.ll
|
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fast-isel-constrain-store-indexreg.ll
|
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|
fast-isel-deadcode.ll
|
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|
fast-isel-divrem-x86-64.ll
|
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fast-isel-divrem.ll
|
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fast-isel-double-half-convertion.ll
|
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fast-isel-emutls.ll
|
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fast-isel-expect.ll
|
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|
fast-isel-extract.ll
|
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|
fast-isel-float-half-convertion.ll
|
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fast-isel-fneg.ll
|
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fast-isel-fold-mem.ll
|
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fast-isel-fptrunc-fpext.ll
|
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fast-isel-gep.ll
|
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fast-isel-gv.ll
|
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fast-isel-i1.ll
|
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|
fast-isel-int-float-conversion.ll
|
|
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|
fast-isel-mem.ll
|
|
|
|
fast-isel-movsbl-indexreg.ll
|
|
|
|
fast-isel-nontemporal.ll
|
[X86][AVX512] Added 512-bit integer vector non-temporal load tests
|
2016-06-07 15:12:47 +00:00 |
|
fast-isel-ret-ext.ll
|
|
|
|
fast-isel-select-cmov2.ll
|
|
|
|
fast-isel-select-cmov.ll
|
|
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|
fast-isel-select-cmp.ll
|
|
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|
fast-isel-select-pseudo-cmov.ll
|
|
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|
fast-isel-select-sse.ll
|
|
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|
fast-isel-select.ll
|
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|
fast-isel-sext.ll
|
|
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|
fast-isel-sse12-fptoint.ll
|
|
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|
fast-isel-stackcheck.ll
|
|
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|
fast-isel-store.ll
|
|
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|
fast-isel-tailcall.ll
|
|
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|
fast-isel-tls.ll
|
|
|
|
fast-isel-trunc-kill-subreg.ll
|
|
|
|
fast-isel-vecload.ll
|
[AVX512] Fix load opcode for fast isel.
|
2016-06-07 13:08:45 +00:00 |
|
fast-isel-x32.ll
|
|
|
|
fast-isel-x86-64.ll
|
|
|
|
fast-isel-x86.ll
|
Refactor X86 symbol access classification.
|
2016-05-20 12:20:10 +00:00 |
|
fast-isel.ll
|
|
|
|
fastcall-correct-mangling.ll
|
|
|
|
fastcc3struct.ll
|
|
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|
fastcc-2.ll
|
|
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|
fastcc-byval.ll
|
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|
fastcc-sret.ll
|
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|
fastcc.ll
|
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|
fastisel-gep-promote-before-add.ll
|
|
|
|
fastmath-float-half-conversion.ll
|
|
|
|
fcmove.ll
|
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|
fdiv-combine.ll
|
|
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|
fdiv.ll
|
|
|
|
field-extract-use-trunc.ll
|
|
|
|
fildll.ll
|
|
|
|
fixup-bw-copy.ll
|
[X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
|
2016-05-07 01:11:17 +00:00 |
|
fixup-bw-copy.mir
|
[X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
|
2016-05-07 01:11:17 +00:00 |
|
fixup-bw-inst.ll
|
|
|
|
fixup-lea.ll
|
|
|
|
float-asmprint.ll
|
|
|
|
float-conv-elim.ll
|
[X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
|
2016-05-07 01:11:17 +00:00 |
|
floor-soft-float.ll
|
|
|
|
fltused_function_pointer.ll
|
|
|
|
fltused.ll
|
|
|
|
fma4-intrinsics-x86_64-folded-load.ll
|
|
|
|
fma_patterns_wide.ll
|
|
|
|
fma_patterns.ll
|
[AVX512] Add VLX 128/256-bit SET0 operations that encode to 128/256-bit EVEX encoded VPXORD so all 32 registers can be used.
|
2016-05-08 21:33:53 +00:00 |
|
fma-commute-x86.ll
|
|
|
|
fma-do-not-commute.ll
|
|
|
|
fma-intrinsics-phi-213-to-231.ll
|
|
|
|
fma-intrinsics-x86.ll
|
|
|
|
fma-phi-213-to-231.ll
|
|
|
|
fma-scalar-memfold.ll
|
|
|
|
fma.ll
|
|
|
|
fmaxnum.ll
|
|
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|
fminnum.ll
|
|
|
|
fmul-combines.ll
|
|
|
|
fmul-zero.ll
|
|
|
|
fnabs.ll
|
|
|
|
fold-add.ll
|
|
|
|
fold-and-shift.ll
|
|
|
|
fold-call-2.ll
|
|
|
|
fold-call-3.ll
|
|
|
|
fold-call-oper.ll
|
|
|
|
fold-call.ll
|
|
|
|
fold-imm.ll
|
|
|
|
fold-load-binops.ll
|
|
|
|
fold-load-unops.ll
|
|
|
|
fold-load-vec.ll
|
|
|
|
fold-load.ll
|
|
|
|
fold-mul-lohi.ll
|
|
|
|
fold-pcmpeqd-1.ll
|
|
|
|
fold-pcmpeqd-2.ll
|
|
|
|
fold-push.ll
|
|
|
|
fold-sext-trunc.ll
|
|
|
|
fold-tied-op.ll
|
|
|
|
fold-vector-bv-crash.ll
|
|
|
|
fold-vector-sext-crash2.ll
|
|
|
|
fold-vector-sext-crash.ll
|
|
|
|
fold-vector-sext-zext.ll
|
|
|
|
fold-vector-shl-crash.ll
|
|
|
|
fold-vector-shuffle-crash.ll
|
|
|
|
fold-vector-trunc-sitofp.ll
|
|
|
|
fold-vex.ll
|
|
|
|
fold-xmm-zero.ll
|
|
|
|
fold-zext-trunc.ll
|
|
|
|
force-align-stack-alloca.ll
|
|
|
|
force-align-stack.ll
|
|
|
|
fp2sint.ll
|
|
|
|
fp128-calling-conv.ll
|
|
|
|
fp128-cast.ll
|
|
|
|
fp128-compare.ll
|
|
|
|
fp128-i128.ll
|
|
|
|
fp128-libcalls.ll
|
|
|
|
fp128-load.ll
|
|
|
|
fp128-store.ll
|
|
|
|
fp_constant_op.ll
|
|
|
|
fp_load_cast_fold.ll
|
|
|
|
fp_load_fold.ll
|
|
|
|
fp-double-rounding.ll
|
|
|
|
fp-elim-and-no-fp-elim.ll
|
|
|
|
fp-elim.ll
|
|
|
|
fp-fast.ll
|
|
|
|
fp-immediate-shorten.ll
|
|
|
|
fp-in-intregs.ll
|
|
|
|
fp-load-trunc.ll
|
|
|
|
fp-logic.ll
|
[x86] add tests to show current codegen for obscured fneg/fabs
|
2016-05-04 19:06:03 +00:00 |
|
fp-select-cmp-and.ll
|
|
|
|
fp-stack-2results.ll
|
|
|
|
fp-stack-compare-cmov.ll
|
|
|
|
fp-stack-compare.ll
|
|
|
|
fp-stack-direct-ret.ll
|
|
|
|
fp-stack-O0-crash.ll
|
|
|
|
fp-stack-O0.ll
|
|
|
|
fp-stack-ret-conv.ll
|
|
|
|
fp-stack-ret-store.ll
|
|
|
|
fp-stack-ret.ll
|
|
|
|
fp-stack-retcopy.ll
|
|
|
|
fp-stack-set-st1.ll
|
|
|
|
fp-stack.ll
|
|
|
|
fp-trunc.ll
|
|
|
|
fp-une-cmp.ll
|
Fix for PR27750. Correctly handle the case where the fallthrough block and
|
2016-05-17 12:47:46 +00:00 |
|
fpcmp-soft-fp.ll
|
|
|
|
fpstack-debuginstr-kill.ll
|
|
|
|
frame-base.ll
|
|
|
|
frameaddr.ll
|
|
|
|
frameregister.ll
|
|
|
|
frem-msvc32.ll
|
|
|
|
fsgsbase.ll
|
|
|
|
fsxor-alignment.ll
|
|
|
|
full-lsr.ll
|
|
|
|
funclet-layout.ll
|
|
|
|
function-alias.ll
|
|
|
|
function-subtarget-features-2.ll
|
|
|
|
function-subtarget-features.ll
|
|
|
|
ga-offset.ll
|
|
|
|
gather-addresses.ll
|
|
|
|
gcc_except_table_functions.ll
|
|
|
|
gcc_except_table.ll
|
|
|
|
getelementptr.ll
|
|
|
|
ghc-cc64.ll
|
|
|
|
ghc-cc.ll
|
|
|
|
global-access-pie.ll
|
Differential Revision: http://reviews.llvm.org/D19733
|
2016-04-29 21:19:16 +00:00 |
|
global-fill.ll
|
|
|
|
global-sections-comdat.ll
|
|
|
|
global-sections-tls.ll
|
|
|
|
global-sections.ll
|
X86-Darwin: start emitting data-region directives for jump-tables.
|
2016-05-03 21:03:41 +00:00 |
|
gs-fold.ll
|
|
|
|
h-register-addressing-32.ll
|
|
|
|
h-register-addressing-64.ll
|
|
|
|
h-register-store.ll
|
|
|
|
h-registers-0.ll
|
|
|
|
h-registers-1.ll
|
|
|
|
h-registers-2.ll
|
|
|
|
h-registers-3.ll
|
|
|
|
haddsub-2.ll
|
|
|
|
haddsub-undef.ll
|
|
|
|
haddsub.ll
|
|
|
|
half.ll
|
[CodeGen] Round [SU]INT_TO_FP result when promoting from f16.
|
2016-05-06 00:58:00 +00:00 |
|
handle-move.ll
|
|
|
|
hhvm-cc.ll
|
|
|
|
hidden-vis-2.ll
|
|
|
|
hidden-vis-3.ll
|
|
|
|
hidden-vis-4.ll
|
|
|
|
hidden-vis-pic.ll
|
|
|
|
hidden-vis.ll
|
|
|
|
hipe-cc64.ll
|
|
|
|
hipe-cc.ll
|
|
|
|
hipe-prologue.ll
|
|
|
|
hoist-common.ll
|
|
|
|
hoist-invariant-load.ll
|
|
|
|
hoist-spill-lpad.ll
|
Fix a bug when hoist spill to a BB with landingpad successor.
|
2016-05-11 22:37:43 +00:00 |
|
hoist-spill.ll
|
|
|
|
huge-stack-offset.ll
|
|
|
|
i1narrowfail.ll
|
|
|
|
i2k.ll
|
|
|
|
i16lshr8pat.ll
|
[X86]: Add a pattern that uses GR16_ABCD rather than GR32_ABCD to avoid falsely marking whole 32 bit register as live.
|
2016-05-31 22:00:12 +00:00 |
|
i64-mem-copy.ll
|
|
|
|
i128-and-beyond.ll
|
|
|
|
i128-immediate.ll
|
|
|
|
i128-mul.ll
|
|
|
|
i128-ret.ll
|
|
|
|
i128-sdiv.ll
|
|
|
|
i256-add.ll
|
|
|
|
i386-setjmp-pic.ll
|
|
|
|
i386-shrink-wrapping.ll
|
|
|
|
i386-tlscall-fastregalloc.ll
|
[X86] Fix the lowering of TLS calls.
|
2016-04-27 21:37:37 +00:00 |
|
i486-fence-loop.ll
|
|
|
|
i686-win-shrink-wrapping.ll
|
[X86] Make sure it is safe to clobber EFLAGS, if need be, when choosing
|
2016-04-26 23:44:14 +00:00 |
|
iabs.ll
|
|
|
|
ident-metadata.ll
|
|
|
|
ifunc-asm.ll
|
|
|
|
illegal-insert.ll
|
|
|
|
illegal-vector-args-return.ll
|
|
|
|
immediate_merging.ll
|
|
|
|
implicit-null-check-negative.ll
|
|
|
|
implicit-null-check.ll
|
[ImplicitNullChecks] Account for implicit-defs as well when updating the liveness.
|
2016-05-03 18:09:06 +00:00 |
|
imul-lea-2.ll
|
|
|
|
imul-lea.ll
|
|
|
|
imul.ll
|
|
|
|
inalloca-ctor.ll
|
Re-commit r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions"
|
2016-05-18 16:10:17 +00:00 |
|
inalloca-invoke.ll
|
Re-commit r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions"
|
2016-05-18 16:10:17 +00:00 |
|
inalloca-regparm.ll
|
|
|
|
inalloca-stdcall.ll
|
Re-commit r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions"
|
2016-05-18 16:10:17 +00:00 |
|
inalloca.ll
|
Re-commit r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions"
|
2016-05-18 16:10:17 +00:00 |
|
inconsistent_landingpad.ll
|
|
|
|
indirect-hidden.ll
|
Simplify handling of hidden stub.
|
2016-05-17 16:01:32 +00:00 |
|
init-priority.ll
|
|
|
|
inline-asm-2addr.ll
|
|
|
|
inline-asm-bad-constraint-n.ll
|
|
|
|
inline-asm-duplicated-constraint.ll
|
|
|
|
inline-asm-error.ll
|
|
|
|
inline-asm-flag-clobber.ll
|
|
|
|
inline-asm-fpstack.ll
|
|
|
|
inline-asm-h.ll
|
|
|
|
inline-asm-modifier-n.ll
|
|
|
|
inline-asm-modifier-q.ll
|
|
|
|
inline-asm-mrv.ll
|
|
|
|
inline-asm-out-regs.ll
|
|
|
|
inline-asm-pic.ll
|
|
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inline-asm-ptr-cast.ll
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inline-asm-q-regs.ll
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inline-asm-R-constraint.ll
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inline-asm-sp-clobber-memcpy.ll
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inline-asm-stack-realign2.ll
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inline-asm-stack-realign3.ll
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inline-asm-stack-realign.ll
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inline-asm-tied.ll
|
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inline-asm-x-scalar.ll
|
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inline-asm.ll
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inline-sse.ll
|
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inlineasm-sched-bug.ll
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inreg.ll
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ins_split_regalloc.ll
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ins_subreg_coalesce-1.ll
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ins_subreg_coalesce-2.ll
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ins_subreg_coalesce-3.ll
|
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insert-positions.ll
|
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insertelement-copytoregs.ll
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insertelement-legalize.ll
|
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insertelement-zero.ll
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insertps-combine.ll
|
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insertps-from-constantpool.ll
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insertps-O0-bug.ll
|
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insertps-unfold-load-bug.ll
|
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int-intrinsic.ll
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interval-update-remat.ll
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invalid-shift-immediate.ll
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isel-optnone.ll
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isel-sink2.ll
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isel-sink3.ll
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isel-sink.ll
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isint.ll
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isnan2.ll
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isnan.ll
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ispositive.ll
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jump_sign.ll
|
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label-redefinition.ll
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lakemont.ll
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large-code-model-isel.ll
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large-constants.ll
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large-gep-chain.ll
|
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large-gep-scale.ll
|
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large-global.ll
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late-address-taken.ll
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ldzero.ll
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lea-2.ll
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lea-3.ll
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lea-4.ll
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lea-5.ll
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lea-opt-memop-check-1.ll
|
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lea-opt-memop-check-2.ll
|
|
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|
lea-opt.ll
|
[X86] Enable RRL part of the LEA optimization pass for -O2.
|
2016-05-19 10:18:29 +00:00 |
|
lea-recursion.ll
|
|
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|
lea.ll
|
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leaf-fp-elim.ll
|
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legalize-fmp-oeq-vector-select.ll
|
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legalize-libcalls.ll
|
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legalize-shift-64.ll
|
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legalize-shl-vec.ll
|
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legalize-sub-zero-2.ll
|
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legalize-sub-zero.ll
|
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legalizedag_vec.ll
|
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lfence.ll
|
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libcall-sret.ll
|
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licm-dominance.ll
|
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licm-nested.ll
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licm-regpressure.ll
|
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licm-symbol.ll
|
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limited-prec.ll
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lit.local.cfg
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live-out-reg-info.ll
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liveness-local-regalloc.ll
|
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llc-override-mcpu-mattr.ll
|
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load-slice.ll
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loc-remat.ll
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local_stack_symbol_ordering.ll
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localescape.ll
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log2_not_readnone.ll
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logical-load-fold.ll
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long-setcc.ll
|
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longlong-deadload.ll
|
|
|
|
loop-blocks.ll
|
[MBP] Use Function::optForSize() instead of checking OptimizeForSize directly.
|
2016-04-29 22:01:10 +00:00 |
|
loop-hoist.ll
|
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loop-strength-reduce2.ll
|
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loop-strength-reduce4.ll
|
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loop-strength-reduce5.ll
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loop-strength-reduce6.ll
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loop-strength-reduce7.ll
|
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loop-strength-reduce8.ll
|
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loop-strength-reduce-2.ll
|
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loop-strength-reduce-3.ll
|
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loop-strength-reduce.ll
|
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lower-bitcast.ll
|
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lower-vec-shift-2.ll
|
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lower-vec-shift.ll
|
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lower-vec-shuffle-bug.ll
|
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lsr-delayed-fold.ll
|
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lsr-i386.ll
|
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lsr-interesting-step.ll
|
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lsr-loop-exit-cond.ll
|
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lsr-negative-stride.ll
|
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lsr-nonaffine.ll
|
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lsr-normalization.ll
|
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lsr-overflow.ll
|
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lsr-quadratic-expand.ll
|
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lsr-redundant-addressing.ll
|
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lsr-reuse-trunc.ll
|
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lsr-reuse.ll
|
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lsr-sort.ll
|
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lsr-static-addr.ll
|
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lsr-wrap.ll
|
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|
lzcnt-tzcnt.ll
|
|
|
|
lzcnt.ll
|
|
|
|
machine-combiner-int-vec.ll
|
|
|
|
machine-combiner-int.ll
|
[X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
|
2016-05-07 01:11:17 +00:00 |
|
machine-combiner.ll
|
|
|
|
machine-copy-prop.mir
|
|
|
|
machine-cp.ll
|
[X86] Replace -mcpu with -mattr in several tests
|
2016-04-26 23:36:38 +00:00 |
|
machine-cse.ll
|
|
|
|
machine-sink-and-implicit-null-checks.ll
|
|
|
|
machine-trace-metrics-crash.ll
|
|
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|
MachineBranchProb.ll
|
|
|
|
MachineSink-CritEdge.ll
|
|
|
|
MachineSink-DbgValue.ll
|
|
|
|
MachineSink-eflags.ll
|
|
|
|
MachineSink-PHIUse.ll
|
|
|
|
macho-comdat.ll
|
|
|
|
masked_gather_scatter.ll
|
[AVX512] Add patterns for VEXTRACT v16i16->v8i16 and v32i8->v16i8. Disable AVX2 versions of vector extract when AVX512VL is enabled.
|
2016-05-21 07:08:56 +00:00 |
|
masked_memop.ll
|
[AVX512] Add patterns for extracting subvectors and storing to memory.
|
2016-05-21 22:50:14 +00:00 |
|
masked-iv-safe.ll
|
|
|
|
masked-iv-unsafe.ll
|
|
|
|
maskmovdqu.ll
|
|
|
|
materialize.ll
|
|
|
|
mature-mc-support.ll
|
|
|
|
mbp-false-cfg-break.ll
|
|
|
|
mcinst-avx-lowering.ll
|
|
|
|
mcinst-lowering.ll
|
|
|
|
mcu-abi.ll
|
|
|
|
mem-intrin-base-reg.ll
|
|
|
|
mem-promote-integers.ll
|
|
|
|
membarrier.ll
|
|
|
|
memcmp.ll
|
|
|
|
memcpy-2.ll
|
|
|
|
memcpy-from-string.ll
|
|
|
|
memcpy.ll
|
|
|
|
memset64-on-x86-32.ll
|
|
|
|
memset-2.ll
|
|
|
|
memset-3.ll
|
|
|
|
memset-nonzero.ll
|
|
|
|
memset-sse-stack-realignment.ll
|
|
|
|
memset.ll
|
|
|
|
merge_store.ll
|
|
|
|
merge-consecutive-loads-128.ll
|
|
|
|
merge-consecutive-loads-256.ll
|
[X86] No need to avoid selecting AVX_SET0 for 256-bit integer types when only AVX1 is supported. AVX_SET0 just expands to 256-bit VXORPS which is legal in AVX1.
|
2016-05-08 07:10:47 +00:00 |
|
merge-consecutive-loads-512.ll
|
[AVX512] Add an AddedComplexity line to the 512-bit insert_subvector undef index 0 patterns. This gives them higher priority than the memory patterns. This matches AVX1/2.
|
2016-05-22 07:40:40 +00:00 |
|
merge-consecutive-stores-i1.ll
|
|
|
|
merge-sp-update-lea.ll
|
|
|
|
merge-store-partially-alias-loads.ll
|
|
|
|
MergeConsecutiveStores.ll
|
|
|
|
mfence.ll
|
|
|
|
mingw-alloca.ll
|
|
|
|
misaligned-memset.ll
|
|
|
|
misched-aa-colored.ll
|
Rework/enhance stack coloring data flow analysis.
|
2016-05-24 13:23:44 +00:00 |
|
misched-aa-mmos.ll
|
|
|
|
misched-balance.ll
|
|
|
|
misched-code-difference-with-debug.ll
|
|
|
|
misched-copy.ll
|
|
|
|
misched-crash.ll
|
|
|
|
misched-fusion.ll
|
|
|
|
misched-ilp.ll
|
[X86] Replace -mcpu with -mattr in several tests
|
2016-04-26 23:36:38 +00:00 |
|
misched-matmul.ll
|
|
|
|
misched-matrix.ll
|
|
|
|
misched-new.ll
|
|
|
|
mmx-arg-passing-x86-64.ll
|
|
|
|
mmx-arg-passing.ll
|
|
|
|
mmx-arith.ll
|
|
|
|
mmx-bitcast-fold.ll
|
|
|
|
mmx-bitcast.ll
|
|
|
|
mmx-coalescing.ll
|
|
|
|
mmx-copy-gprs.ll
|
|
|
|
mmx-fold-load.ll
|
|
|
|
mmx-intrinsics.ll
|
|
|
|
mmx-only.ll
|
|
|
|
mod128.ll
|
|
|
|
movbe.ll
|
|
|
|
movfs.ll
|
|
|
|
movgs.ll
|
[X86][SSE] Use shuffle/sext instead of deprecated (+ auto-upgraded) pmovsxwd intrinsic call
|
2016-05-23 21:21:38 +00:00 |
|
movmsk.ll
|
|
|
|
movntdq-no-avx.ll
|
|
|
|
movpc32-check.ll
|
|
|
|
movtopush64.ll
|
Enable the X86 call frame optimization for the 64-bit targets that allow it.
|
2016-05-02 13:45:25 +00:00 |
|
movtopush.ll
|
|
|
|
ms-inline-asm.ll
|
|
|
|
mul64.ll
|
|
|
|
mul128_sext_loop.ll
|
|
|
|
mul128.ll
|
|
|
|
mul-i256.ll
|
[SDAG] Add a fallback multiplication expansion
|
2016-05-25 16:50:22 +00:00 |
|
mul-legalize.ll
|
|
|
|
mul-remat.ll
|
|
|
|
mul-shift-reassoc.ll
|
|
|
|
muloti.ll
|
|
|
|
mult-alt-generic-i686.ll
|
|
|
|
mult-alt-generic-x86_64.ll
|
|
|
|
mult-alt-x86.ll
|
|
|
|
multiple-loop-post-inc.ll
|
|
|
|
multiple-return-values-cross-block.ll
|
|
|
|
mulx32.ll
|
|
|
|
mulx64.ll
|
|
|
|
musttail-fastcall.ll
|
|
|
|
musttail-indirect.ll
|
|
|
|
musttail-thiscall.ll
|
|
|
|
musttail-varargs.ll
|
[X86] Add a few register classes for x32 address accesses.
|
2016-05-04 22:45:31 +00:00 |
|
musttail.ll
|
|
|
|
mwaitx.ll
|
Add new flag and intrinsic support for MWAITX and MONITORX instructions
|
2016-05-18 11:59:12 +00:00 |
|
named-reg-alloc.ll
|
|
|
|
named-reg-notareg.ll
|
|
|
|
nancvt.ll
|
|
|
|
narrow_op-1.ll
|
|
|
|
narrow-shl-cst.ll
|
|
|
|
narrow-shl-load.ll
|
|
|
|
neg_cmp.ll
|
|
|
|
neg_fp.ll
|
|
|
|
neg-shl-add.ll
|
|
|
|
negate-add-zero.ll
|
|
|
|
negative_zero.ll
|
|
|
|
negative-offset.ll
|
|
|
|
negative-sin.ll
|
|
|
|
negative-stride-fptosi-user.ll
|
|
|
|
negative-subscript.ll
|
|
|
|
new-remat.ll
|
|
|
|
newline-and-quote.ll
|
|
|
|
no-cmov.ll
|
|
|
|
no-sse2-avg.ll
|
Only attempt to detect AVG if SSE2 is available
|
2016-06-02 17:30:49 +00:00 |
|
nobt.ll
|
|
|
|
nocx16.ll
|
|
|
|
non-lazy-bind.ll
|
|
|
|
non-unique-sections.ll
|
|
|
|
nonconst-static-ev.ll
|
|
|
|
nonconst-static-iv.ll
|
|
|
|
nontemporal-2.ll
|
[X86] Added nontemporal scalar store tests
|
2016-06-03 10:30:54 +00:00 |
|
nontemporal-loads.ll
|
[X86][SSE] Add general lowering of nontemporal vector loads
|
2016-06-07 13:34:24 +00:00 |
|
nontemporal.ll
|
[X86] Regenerated nontemporal store tests and added tests for all 128-bit vector types
|
2016-06-03 10:15:36 +00:00 |
|
noreturn-call.ll
|
X86: Don't reset the stack after calls that don't return (PR27117)
|
2016-05-19 20:15:33 +00:00 |
|
norex-subreg.ll
|
|
|
|
nosse-error1.ll
|
|
|
|
nosse-error2.ll
|
|
|
|
nosse-varargs.ll
|
|
|
|
null-streamer.ll
|
|
|
|
objc-gc-module-flags.ll
|
|
|
|
object-size.ll
|
|
|
|
opaque-constant-asm.ll
|
|
|
|
opt-ext-uses.ll
|
[X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
|
2016-05-07 01:11:17 +00:00 |
|
opt-shuff-tstore.ll
|
|
|
|
optimize-max-0.ll
|
|
|
|
optimize-max-1.ll
|
|
|
|
optimize-max-2.ll
|
|
|
|
optimize-max-3.ll
|
|
|
|
or-address.ll
|
|
|
|
or-branch.ll
|
|
|
|
or-lea.ll
|
|
|
|
osx-private-labels.ll
|
|
|
|
overlap-shift.ll
|
|
|
|
packed_struct.ll
|
|
|
|
palignr.ll
|
|
|
|
pass-three.ll
|
|
|
|
patchable-prologue.ll
|
|
|
|
patchpoint-invoke.ll
|
|
|
|
patchpoint-verifiable.mir
|
|
|
|
patchpoint-webkit_jscc.ll
|
|
|
|
patchpoint.ll
|
|
|
|
peep-setb.ll
|
|
|
|
peep-test-0.ll
|
|
|
|
peep-test-1.ll
|
|
|
|
peep-test-2.ll
|
|
|
|
peep-test-3.ll
|
|
|
|
peep-test-4.ll
|
|
|
|
peephole-fold-movsd.ll
|
|
|
|
peephole-multiple-folds.ll
|
|
|
|
peephole-na-phys-copy-folding.ll
|
[X86] Update a regexp in a test case to resist register allocation
|
2016-05-09 19:01:42 +00:00 |
|
personality_size.ll
|
|
|
|
personality.ll
|
|
|
|
phaddsub.ll
|
|
|
|
phi-bit-propagation.ll
|
|
|
|
phi-immediate-factoring.ll
|
|
|
|
phielim-split.ll
|
|
|
|
phys_subreg_coalesce-2.ll
|
|
|
|
phys_subreg_coalesce-3.ll
|
|
|
|
phys_subreg_coalesce.ll
|
|
|
|
phys-reg-local-regalloc.ll
|
|
|
|
pic_jumptable.ll
|
X86-Darwin: start emitting data-region directives for jump-tables.
|
2016-05-03 21:03:41 +00:00 |
|
pic-load-remat.ll
|
|
|
|
pic.ll
|
|
|
|
pie.ll
|
Differential Revision: http://reviews.llvm.org/D19733
|
2016-04-29 21:19:16 +00:00 |
|
pku.ll
|
|
|
|
pmovext.ll
|
|
|
|
pmovsx-inreg.ll
|
|
|
|
pmul.ll
|
|
|
|
pmulld.ll
|
|
|
|
pointer-vector.ll
|
|
|
|
pop-stack-cleanup.ll
|
|
|
|
popcnt.ll
|
|
|
|
post-ra-sched.ll
|
[X86] Enable the post-RA-scheduler for clang's default 32-bit cpu.
|
2016-04-27 22:52:35 +00:00 |
|
postalloc-coalescing.ll
|
|
|
|
postra-licm.ll
|
|
|
|
powi.ll
|
|
|
|
pr1462.ll
|
|
|
|
pr1489.ll
|
|
|
|
pr1505.ll
|
|
|
|
pr1505b.ll
|
|
|
|
pr2177.ll
|
|
|
|
pr2182.ll
|
|
|
|
pr2326.ll
|
|
|
|
pr2585.ll
|
Make "@name =" mandatory for globals in .ll files.
|
2016-05-10 18:22:45 +00:00 |
|
pr2656.ll
|
|
|
|
pr2659.ll
|
|
|
|
pr2849.ll
|
|
|
|
pr2924.ll
|
|
|
|
pr2982.ll
|
|
|
|
pr3154.ll
|
|
|
|
pr3216.ll
|
|
|
|
pr3241.ll
|
|
|
|
pr3243.ll
|
|
|
|
pr3244.ll
|
|
|
|
pr3250.ll
|
|
|
|
pr3317.ll
|
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|
|
pr3366.ll
|
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|
pr3457.ll
|
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|
|
pr3522.ll
|
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|
pr5145.ll
|
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pr7882.ll
|
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pr9127.ll
|
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pr9743.ll
|
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|
pr10068.ll
|
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|
pr10475.ll
|
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pr10499.ll
|
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pr10523.ll
|
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|
pr10524.ll
|
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pr10525.ll
|
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|
pr10526.ll
|
|
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pr11202.ll
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pr11334.ll
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pr11415.ll
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pr11468.ll
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pr11985.ll
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pr11998.ll
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pr12312.ll
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pr12360.ll
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pr12889.ll
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pr13209.ll
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pr13220.ll
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pr13458.ll
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pr13577.ll
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pr13859.ll
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pr13899.ll
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pr14088.ll
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pr14098.ll
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pr14161.ll
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pr14204.ll
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pr14314.ll
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pr14333.ll
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pr14562.ll
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pr15267.ll
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pr15296.ll
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pr15309.ll
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pr16031.ll
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pr16360.ll
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[x86] avoid printing unnecessary sign bits of hex immediates in asm comments (PR20347)
|
2016-05-28 14:58:37 +00:00 |
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pr16807.ll
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pr17546.ll
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pr17631.ll
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pr17764.ll
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[x86, AVX2] regenerate checks
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2016-06-01 21:32:56 +00:00 |
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pr18014.ll
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pr18023.ll
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pr18054.ll
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pr18162.ll
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pr18846.ll
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pr19049.ll
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pr20020.ll
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pr20088.ll
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pr21099.ll
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pr21792.ll
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pr22019.ll
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pr22103.ll
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pr22774.ll
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pr23103.ll
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pr23246.ll
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pr23273.ll
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pr23603.ll
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pr23664.ll
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[X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
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2016-05-07 01:11:17 +00:00 |
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pr24139.ll
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pr24374.ll
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pr24602.ll
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pr25828.ll
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pr26350.ll
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pr26625.ll
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pr26652.ll
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pr26757.ll
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pr26835.ll
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pr26870.ll
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pr27071.ll
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pr27501.ll
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pr27591.ll
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[X86] Lower zext i1 arguments
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2016-05-04 00:22:23 +00:00 |
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pr27681.mir
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[CodeGen] Fix problem with X86 byte registers in CriticalAntiDepBreaker
|
2016-05-26 23:08:52 +00:00 |
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pre-ra-sched.ll
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prefetch.ll
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prefixdata.ll
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preserve_allcc64.ll
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preserve_mostcc64.ll
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private-2.ll
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private.ll
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prolog-push-seq.ll
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prologuedata.ll
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promote-assert-zext.ll
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promote-i16.ll
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promote-trunc.ll
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promote.ll
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ps4-noreturn.ll
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pseudo_cmov_lower1.ll
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pseudo_cmov_lower2.ll
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pseudo_cmov_lower.ll
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pshufb-mask-comments.ll
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pshufd-combine-crash.ll
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psubus.ll
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ptr-rotate.ll
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ptrtoint-constexpr.ll
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push-cfi-debug.ll
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push-cfi-obj.ll
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push-cfi.ll
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ragreedy-bug.ll
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ragreedy-hoist-spill.ll
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ragreedy-last-chance-recoloring.ll
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rd-mod-wr-eflags.ll
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rdpmc.ll
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rdrand.ll
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rdseed.ll
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rdtsc.ll
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read-fp-no-frame-pointer.ll
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recip-fastmath.ll
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red-zone2.ll
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red-zone.ll
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reduce-trunc-shl.ll
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DAGCombiner: Reduce truncated shl width
|
2016-04-29 19:53:16 +00:00 |
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regalloc-reconcile-broken-hints.ll
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regalloc-spill-at-ehpad.ll
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reghinting.ll
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regpressure.ll
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rem_crash.ll
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rem.ll
|
[x86] avoid printing unnecessary sign bits of hex immediates in asm comments (PR20347)
|
2016-05-28 14:58:37 +00:00 |
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remat-constant.ll
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remat-fold-load.ll
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remat-mov-0.ll
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remat-phys-dead.ll
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remat-scalar-zero.ll
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ret-addr.ll
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ret-i64-0.ll
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ret-mmx.ll
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return_zeroext_i2.ll
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return-ext.ll
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returned-trunc-tail-calls.ll
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reverse_branches.ll
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rip-rel-address.ll
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rip-rel-lea.ll
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rodata-relocs.ll
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rot16.ll
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rot32.ll
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rot64.ll
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rotate2.ll
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rotate4.ll
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rotate.ll
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rounding-ops.ll
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rrlist-livereg-corrutpion.ll
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rtm.ll
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[X86][RTM] _xabort() should not have "noreturn" attribute
|
2016-05-23 14:04:17 +00:00 |
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sad.ll
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[X86][AVX512] Added avx512 VPSLLDQ/VPSRLDQ instruction comments
|
2016-06-09 22:03:15 +00:00 |
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saddo-redundant-add.ll
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safestack_ssp.ll
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safestack.ll
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sandybridge-loads.ll
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sar_fold64.ll
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sar_fold.ll
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scalar_sse_minmax.ll
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scalar_widen_div.ll
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scalar-extract.ll
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scalar-fp-to-i64.ll
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scalar-int-to-fp.ll
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scalar-min-max-fill-operand.ll
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scalarize-bitcast.ll
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scev-interchange.ll
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scheduler-backtracking.ll
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sdiv-exact.ll
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sdiv-pow2.ll
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segmented-stacks-dynamic.ll
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segmented-stacks.ll
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seh-catch-all-win32.ll
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seh-catch-all.ll
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seh-catchpad.ll
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seh-except-finally.ll
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seh-exception-code.ll
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seh-filter-no-personality.ll
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seh-finally.ll
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seh-safe-div-win32.ll
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seh-safe-div.ll
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seh-stack-realign.ll
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select_const.ll
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select-with-and-or.ll
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select.ll
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selectiondag-crash.ll
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selectiondag-cse.ll
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setcc-combine.ll
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setcc-lowering.ll
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setcc-narrowing.ll
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setcc-sentinals.ll
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setcc.ll
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[X86] Use the right type when folding xor (truncate (shift)) -> setcc
|
2016-05-05 06:00:56 +00:00 |
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setjmp-spills.ll
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setoeq.ll
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setuge.ll
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sext-i1.ll
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sext-load.ll
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sext-ret-val.ll
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sext-setcc-self.ll
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sext-subreg.ll
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sext-trunc.ll
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sfence.ll
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sha.ll
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shift-and.ll
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shift-avx2-crash.ll
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shift-bmi2.ll
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shift-coalesce.ll
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shift-codegen.ll
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shift-combine-crash.ll
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shift-combine.ll
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shift-double.ll
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shift-folding.ll
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shift-i128.ll
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shift-i256.ll
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shift-one.ll
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shift-pair.ll
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shift-parts.ll
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shift-pcmp.ll
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shl_elim.ll
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shl_undef.ll
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shl-anyext.ll
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shl-i64.ll
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shrink-compare.ll
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shrink-fp-const1.ll
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shrink-fp-const2.ll
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shrink-wrap-chkstk.ll
|
Re-commit r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions"
|
2016-05-18 16:10:17 +00:00 |
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shrinkwrap-hang.ll
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shuffle-combine-crash.ll
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sibcall-2.ll
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sibcall-3.ll
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sibcall-4.ll
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sibcall-5.ll
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sibcall-6.ll
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sibcall-byval.ll
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sibcall-win64.ll
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sibcall.ll
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simple-zext.ll
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sincos-opt.ll
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sincos.ll
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sink-blockfreq.ll
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sink-cheap-instructions.ll
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sink-hoist.ll
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sink-out-of-loop.ll
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sjlj-baseptr.ll
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sjlj-eh.ll
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X86: permit using SjLj EH on x86 targets as an option
|
2016-05-31 01:48:07 +00:00 |
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sjlj.ll
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slow-div.ll
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slow-incdec.ll
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slow-unaligned-mem.ll
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small-byval-memcpy.ll
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smul-with-overflow.ll
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soft-fp.ll
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soft-sitofp.ll
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splat-const.ll
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splat-for-size.ll
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split-eh-lpad-edges.ll
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split-vector-bitcast.ll
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split-vector-rem.ll
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sqrt-fastmath.ll
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sqrt.ll
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sret-implicit.ll
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sse1.ll
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sse2-intrinsics-fast-isel-x86_64.ll
|
[X86][SSE2] Added fast-isel tests to sync with clang/test/CodeGen/sse2-builtins.c
|
2016-05-18 18:00:43 +00:00 |
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sse2-intrinsics-fast-isel.ll
|
[X86][SSE] Replace (V)CVTTPS2DQ and VCVTTPD2DQ truncating (round to zero) f32/f64 to i32 with generic IR (llvm)
|
2016-06-02 10:55:21 +00:00 |
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sse2-intrinsics-x86-upgrade.ll
|
[X86][SSE] Replace (V)CVTTPS2DQ and VCVTTPD2DQ truncating (round to zero) f32/f64 to i32 with generic IR (llvm)
|
2016-06-02 10:55:21 +00:00 |
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sse2-intrinsics-x86.ll
|
[X86][SSE] Replace (V)CVTTPS2DQ and VCVTTPD2DQ truncating (round to zero) f32/f64 to i32 with generic IR (llvm)
|
2016-06-02 10:55:21 +00:00 |
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sse2-vector-shifts.ll
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sse2.ll
|
[X86] Replace -mcpu with -mattr in several tests
|
2016-04-26 23:36:38 +00:00 |
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sse3-avx-addsub-2.ll
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sse3-avx-addsub.ll
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sse3-intrinsics-fast-isel.ll
|
[X86][SSE3] Sync with clang/test/CodeGen/sse3-builtins.c
|
2016-05-18 13:16:31 +00:00 |
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sse3-intrinsics-x86.ll
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sse3.ll
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sse4a-intrinsics-fast-isel.ll
|
[X86][SSE4A] Regenerated SSE4A intrinsics tests
|
2016-06-07 21:15:45 +00:00 |
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sse4a.ll
|
[X86][SSE4A] Regenerated SSE4A intrinsics tests
|
2016-06-07 21:15:45 +00:00 |
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sse41-intrinsics-fast-isel.ll
|
[X86][SSE] (Reapplied) Replace (V)PMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (llvm)
|
2016-05-28 18:03:41 +00:00 |
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sse41-intrinsics-x86-upgrade.ll
|
[X86][SSE] (Reapplied) Replace (V)PMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (llvm)
|
2016-05-28 18:03:41 +00:00 |
|
sse41-intrinsics-x86.ll
|
[X86][SSE] (Reapplied) Replace (V)PMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (llvm)
|
2016-05-28 18:03:41 +00:00 |
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sse41-pmovxrm.ll
|
[X86][SSE] Renamed pmovxrm tests
|
2016-05-30 19:14:37 +00:00 |
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sse41.ll
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sse42_64.ll
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sse42-intrinsics-fast-isel-x86_64.ll
|
[X86][SSE42] Added fast-isel tests to sync with clang/test/CodeGen/sse42-builtins.c
|
2016-05-18 14:28:54 +00:00 |
|
sse42-intrinsics-fast-isel.ll
|
[X86][SSE42] Added fast-isel tests to sync with clang/test/CodeGen/sse42-builtins.c
|
2016-05-18 14:28:54 +00:00 |
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sse42-intrinsics-x86.ll
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sse42.ll
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sse_partial_update.ll
|
[X86][SSE] Regenerated partial register update tests
|
2016-05-23 12:49:37 +00:00 |
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sse_reload_fold.ll
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sse-align-0.ll
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sse-align-1.ll
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sse-align-2.ll
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sse-align-3.ll
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sse-align-4.ll
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sse-align-5.ll
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sse-align-6.ll
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sse-align-7.ll
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sse-align-8.ll
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sse-align-9.ll
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sse-align-10.ll
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sse-align-11.ll
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sse-align-12.ll
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sse-commute.ll
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sse-domains.ll
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sse-fcopysign.ll
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sse-intel-ocl.ll
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sse-intrinsics-fast-isel-x86_64.ll
|
[X86][SSE] Added fast-isel tests to sync with clang/test/CodeGen/sse-builtins.c
|
2016-05-19 16:55:52 +00:00 |
|
sse-intrinsics-fast-isel.ll
|
[X86][SSE] Updated storeu fast-isel tests to match clang builtin tests
|
2016-05-30 18:42:51 +00:00 |
|
sse-intrinsics-x86-upgrade.ll
|
[X86] Remove SSE/AVX unaligned store intrinsics as clang no longer uses them. Auto upgrade to native unaligned store instructions.
|
2016-05-30 23:15:56 +00:00 |
|
sse-intrinsics-x86.ll
|
[X86] Remove SSE/AVX unaligned store intrinsics as clang no longer uses them. Auto upgrade to native unaligned store instructions.
|
2016-05-30 23:15:56 +00:00 |
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sse-load-ret.ll
|
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sse-minmax.ll
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sse-only.ll
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sse-scalar-fp-arith-unary.ll
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sse-scalar-fp-arith.ll
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sse-unaligned-mem-feature.ll
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sse-varargs.ll
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ssp-data-layout.ll
|
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ssp-guard-spill.ll
|
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ssse3-intrinsics-fast-isel.ll
|
[X86][SSSE3] Sync with clang/test/CodeGen/ssse3-builtins.c
|
2016-05-18 11:19:17 +00:00 |
|
ssse3-intrinsics-x86.ll
|
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stack_guard_remat.ll
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stack-align2.ll
|
[X86] Extend some Linux special cases to cover kFreeBSD.
|
2016-05-05 11:35:51 +00:00 |
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stack-align-memcpy.ll
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stack-align.ll
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stack-folding-3dnow.ll
|
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stack-folding-adx-x86_64.ll
|
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stack-folding-fp-avx1.ll
|
[X86][SSE] Added cvtdq2pd/cvtps2pd generic IR tests
|
2016-05-23 21:45:02 +00:00 |
|
stack-folding-fp-sse42.ll
|
[X86][SSE] Added cvtdq2pd/cvtps2pd generic IR tests
|
2016-05-23 21:45:02 +00:00 |
|
stack-folding-int-avx1.ll
|
|
|
|
stack-folding-int-avx2.ll
|
[X86][SSE] (Reapplied) Replace (V)PMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (llvm)
|
2016-05-28 18:03:41 +00:00 |
|
stack-folding-int-sse42.ll
|
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stack-folding-mmx.ll
|
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stack-folding-x86_64.ll
|
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stack-folding-xop.ll
|
[X86][XOP] Support for VPERMIL2PD/VPERMIL2PS 2-input shuffle instructions
|
2016-06-03 08:06:03 +00:00 |
|
stack-probe-size.ll
|
|
|
|
stack-protector-dbginfo.ll
|
|
|
|
stack-protector-msvc.ll
|
[stack-protection] Add support for MSVC buffer security check
|
2016-06-07 20:15:35 +00:00 |
|
stack-protector-target.ll
|
[X86] Extend some Linux special cases to cover kFreeBSD.
|
2016-05-05 11:35:51 +00:00 |
|
stack-protector-vreg-to-vreg-copy.ll
|
|
|
|
stack-protector-weight.ll
|
[stack-protection] Add support for MSVC buffer security check
|
2016-06-07 20:15:35 +00:00 |
|
stack-protector.ll
|
[stack-protection] Add support for MSVC buffer security check
|
2016-06-07 20:15:35 +00:00 |
|
stack-update-frame-opcode.ll
|
|
|
|
StackColoring-dbg.ll
|
Revert changes after test commit.
|
2016-05-14 13:29:52 +00:00 |
|
StackColoring.ll
|
Better fix for PR27903.
|
2016-06-01 17:55:10 +00:00 |
|
stackguard-internal.ll
|
Also fix a typo. Need more coffee today.
|
2016-06-09 17:06:01 +00:00 |
|
stackmap-fast-isel.ll
|
|
|
|
stackmap-frame-setup.ll
|
|
|
|
stackmap-large-constants.ll
|
|
|
|
stackmap-liveness.ll
|
|
|
|
stackmap-nops.ll
|
|
|
|
stackmap-shadow-optimization.ll
|
|
|
|
stackmap.ll
|
|
|
|
stackpointer.ll
|
|
|
|
statepoint-allocas.ll
|
|
|
|
statepoint-call-lowering.ll
|
|
|
|
statepoint-far-call.ll
|
|
|
|
statepoint-forward.ll
|
|
|
|
statepoint-gctransition-call-lowering.ll
|
|
|
|
statepoint-invoke.ll
|
|
|
|
statepoint-stack-usage.ll
|
|
|
|
statepoint-stackmap-format.ll
|
|
|
|
statepoint-uniqueing.ll
|
|
|
|
statepoint-vector-bad-spill.ll
|
|
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|
statepoint-vector.ll
|
|
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|
stdarg.ll
|
|
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|
stdcall-notailcall.ll
|
|
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|
stdcall.ll
|
|
|
|
store_op_load_fold2.ll
|
|
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|
store_op_load_fold.ll
|
|
|
|
store-empty-member.ll
|
|
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|
store-fp-constant.ll
|
|
|
|
store-global-address.ll
|
|
|
|
store-narrow.ll
|
|
|
|
store-zero-and-minus-one.ll
|
|
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|
stores-merging.ll
|
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|
storetrunc-fp.ll
|
|
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|
stride-nine-with-base-reg.ll
|
|
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|
stride-reuse.ll
|
|
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|
sub-with-overflow.ll
|
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|
sub.ll
|
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|
subreg-to-reg-0.ll
|
|
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|
subreg-to-reg-1.ll
|
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|
subreg-to-reg-2.ll
|
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|
subreg-to-reg-3.ll
|
|
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|
subreg-to-reg-4.ll
|
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|
subreg-to-reg-6.ll
|
|
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|
sunkaddr-ext.ll
|
|
|
|
swift-return.ll
|
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|
swifterror.ll
|
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|
swiftself.ll
|
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|
switch-bt.ll
|
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|
switch-crit-edge-constant.ll
|
|
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switch-default-only.ll
|
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switch-density.ll
|
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switch-edge-weight.ll
|
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switch-jump-table.ll
|
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switch-or.ll
|
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|
switch-order-weight.ll
|
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|
switch-zextload.ll
|
|
|
|
switch.ll
|
The associated PR for this test was PR27135 not PR27132.
|
2016-05-06 18:23:14 +00:00 |
|
SwitchLowering.ll
|
|
|
|
swizzle-2.ll
|
|
|
|
swizzle-avx2.ll
|
|
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|
SwizzleShuff.ll
|
|
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|
system-intrinsics-64-xsave.ll
|
|
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|
system-intrinsics-64-xsavec.ll
|
|
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system-intrinsics-64-xsaveopt.ll
|
|
|
|
system-intrinsics-64-xsaves.ll
|
|
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|
system-intrinsics-64.ll
|
|
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|
system-intrinsics-xsave.ll
|
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|
system-intrinsics-xsavec.ll
|
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|
system-intrinsics-xsaveopt.ll
|
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|
system-intrinsics-xsaves.ll
|
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|
system-intrinsics.ll
|
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|
tail-call-attrs.ll
|
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tail-call-casts.ll
|
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tail-call-got.ll
|
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|
tail-call-legality.ll
|
|
|
|
tail-call-parameter-attrs-mismatch.ll
|
|
|
|
tail-call-win64.ll
|
|
|
|
tail-dup-addr.ll
|
|
|
|
tail-dup-catchret.ll
|
|
|
|
tail-merge-wineh.ll
|
|
|
|
tail-opts.ll
|
|
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|
tail-threshold.ll
|
|
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|
tailcall-64.ll
|
|
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|
tailcall-calleesave.ll
|
|
|
|
tailcall-cgp-dup.ll
|
|
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|
tailcall-disable.ll
|
|
|
|
tailcall-fastisel.ll
|
|
|
|
tailcall-largecode.ll
|
|
|
|
tailcall-mem-intrinsics.ll
|
|
|
|
tailcall-msvc-conventions.ll
|
|
|
|
tailcall-multiret.ll
|
|
|
|
tailcall-readnone.ll
|
|
|
|
tailcall-returndup-void.ll
|
|
|
|
tailcall-ri64.ll
|
|
|
|
tailcall-stackalign.ll
|
|
|
|
tailcall-structret.ll
|
|
|
|
tailcall.ll
|
|
|
|
tailcallbyval64.ll
|
|
|
|
tailcallbyval.ll
|
|
|
|
tailcallfp2.ll
|
|
|
|
tailcallfp.ll
|
|
|
|
tailcallpic1.ll
|
|
|
|
tailcallpic2.ll
|
|
|
|
tailcallpic3.ll
|
|
|
|
tailcallstack64.ll
|
|
|
|
targetLoweringGeneric.ll
|
|
|
|
tbm_patterns.ll
|
|
|
|
tbm-intrinsics-x86_64.ll
|
|
|
|
test-nofold.ll
|
|
|
|
test-shrink-bug.ll
|
|
|
|
test-shrink.ll
|
|
|
|
testb-je-fusion.ll
|
|
|
|
testl-commute.ll
|
|
|
|
this-return-64.ll
|
|
|
|
tls-addr-non-leaf-function.ll
|
|
|
|
tls-android-negative.ll
|
|
|
|
tls-android.ll
|
|
|
|
tls-local-dynamic.ll
|
|
|
|
tls-models.ll
|
|
|
|
tls-pic.ll
|
|
|
|
tls-pie.ll
|
Differential Revision: http://reviews.llvm.org/D19733
|
2016-04-29 21:19:16 +00:00 |
|
tls-shrink-wrapping.ll
|
|
|
|
tls-windows-itanium.ll
|
X86: enable TLS on Windows itanium
|
2016-06-04 18:27:22 +00:00 |
|
tls.ll
|
|
|
|
tlv-1.ll
|
|
|
|
tlv-2.ll
|
|
|
|
tlv-3.ll
|
|
|
|
token_landingpad.ll
|
|
|
|
trap.ll
|
|
|
|
trunc-ext-ld-st.ll
|
|
|
|
trunc-store.ll
|
|
|
|
trunc-to-bool.ll
|
|
|
|
TruncAssertZext.ll
|
|
|
|
twoaddr-coalesce-2.ll
|
|
|
|
twoaddr-coalesce-3.ll
|
|
|
|
twoaddr-coalesce.ll
|
|
|
|
twoaddr-lea.ll
|
|
|
|
twoaddr-pass-sink.ll
|
|
|
|
twoaddr-sink-terminator.ll
|
|
|
|
uint64-to-float.ll
|
|
|
|
uint_to_fp-2.ll
|
|
|
|
uint_to_fp.ll
|
|
|
|
umul-with-carry.ll
|
|
|
|
umul-with-overflow.ll
|
|
|
|
unaligned-32-byte-memops.ll
|
|
|
|
unaligned-load.ll
|
|
|
|
unaligned-spill-folding.ll
|
|
|
|
undef-label.ll
|
|
|
|
unknown-location.ll
|
|
|
|
unreachable-loop-sinking.ll
|
|
|
|
unused_stackslots.ll
|
|
|
|
unwind-init.ll
|
|
|
|
unwindraise.ll
|
|
|
|
urem-i8-constant.ll
|
update test to use FileCheck for tighter checking
|
2016-05-10 21:42:09 +00:00 |
|
urem-power-of-two.ll
|
[x86] add tests for urem lowering
|
2016-05-19 18:57:54 +00:00 |
|
use-add-flags.ll
|
|
|
|
utf8.ll
|
|
|
|
utf16-cfstrings.ll
|
|
|
|
v2f32.ll
|
|
|
|
v4f32-immediate.ll
|
|
|
|
v4i32load-crash.ll
|
|
|
|
v8i1-masks.ll
|
|
|
|
vaargs.ll
|
|
|
|
vararg_no_start.ll
|
|
|
|
vararg_tailcall.ll
|
|
|
|
vararg-callee-cleanup.ll
|
|
|
|
variable-sized-darwin-bzero.ll
|
|
|
|
variadic-node-pic.ll
|
|
|
|
vastart-defs-eflags.ll
|
|
|
|
vbinop-simplify-bug.ll
|
|
|
|
vec_add.ll
|
|
|
|
vec_align_i256.ll
|
|
|
|
vec_align.ll
|
|
|
|
vec_anyext.ll
|
|
|
|
vec_call.ll
|
|
|
|
vec_cast2.ll
|
|
|
|
vec_cast.ll
|
|
|
|
vec_cmp_sint-128.ll
|
|
|
|
vec_cmp_uint-128.ll
|
|
|
|
vec_compare-sse4.ll
|
|
|
|
vec_compare.ll
|
|
|
|
vec_ctbits.ll
|
|
|
|
vec_ext_inreg.ll
|
|
|
|
vec_extract-avx.ll
|
|
|
|
vec_extract-mmx.ll
|
[X86] Don't assume that MMX extractelts are from index 0.
|
2016-04-27 01:35:29 +00:00 |
|
vec_extract-sse4.ll
|
|
|
|
vec_extract.ll
|
|
|
|
vec_fabs.ll
|
|
|
|
vec_floor.ll
|
|
|
|
vec_fneg.ll
|
[DAG] use getBitcast() to reduce code
|
2016-06-02 16:01:15 +00:00 |
|
vec_fp_to_int.ll
|
|
|
|
vec_fpext.ll
|
|
|
|
vec_fptrunc.ll
|
|
|
|
vec_i64.ll
|
|
|
|
vec_ins_extract-1.ll
|
|
|
|
vec_ins_extract.ll
|
|
|
|
vec_insert-2.ll
|
|
|
|
vec_insert-3.ll
|
|
|
|
vec_insert-4.ll
|
|
|
|
vec_insert-5.ll
|
|
|
|
vec_insert-7.ll
|
|
|
|
vec_insert-8.ll
|
|
|
|
vec_insert-9.ll
|
|
|
|
vec_insert-mmx.ll
|
|
|
|
vec_int_to_fp.ll
|
[X86][SSE] Add load-folding patterns for (V)CVTDQ2PD (PR27291)
|
2016-05-31 12:04:35 +00:00 |
|
vec_loadsingles.ll
|
|
|
|
vec_logical.ll
|
|
|
|
vec_minmax_sint.ll
|
|
|
|
vec_minmax_uint.ll
|
|
|
|
vec_partial.ll
|
|
|
|
vec_reassociate.ll
|
|
|
|
vec_return.ll
|
|
|
|
vec_round.ll
|
|
|
|
vec_sdiv_to_shift.ll
|
|
|
|
vec_set-2.ll
|
|
|
|
vec_set-3.ll
|
|
|
|
vec_set-4.ll
|
|
|
|
vec_set-6.ll
|
|
|
|
vec_set-7.ll
|
|
|
|
vec_set-8.ll
|
|
|
|
vec_set-A.ll
|
|
|
|
vec_set-B.ll
|
|
|
|
vec_set-C.ll
|
|
|
|
vec_set-D.ll
|
|
|
|
vec_set-F.ll
|
|
|
|
vec_set-H.ll
|
|
|
|
vec_set.ll
|
|
|
|
vec_setcc-2.ll
|
|
|
|
vec_setcc.ll
|
|
|
|
vec_shift2.ll
|
|
|
|
vec_shift3.ll
|
|
|
|
vec_shift4.ll
|
|
|
|
vec_shift5.ll
|
|
|
|
vec_shift6.ll
|
|
|
|
vec_shift7.ll
|
|
|
|
vec_shift.ll
|
|
|
|
vec_shuf-insert.ll
|
|
|
|
vec_split.ll
|
|
|
|
vec_ss_load_fold.ll
|
[X86][SSE] Regenerated scalar load folding tests
|
2016-05-23 12:53:09 +00:00 |
|
vec_trunc_sext.ll
|
|
|
|
vec_udiv_to_shift.ll
|
|
|
|
vec_uint_to_fp-fastmath.ll
|
|
|
|
vec_uint_to_fp.ll
|
|
|
|
vec_unsafe-fp-math.ll
|
|
|
|
vec_zero_cse.ll
|
|
|
|
vec_zero-2.ll
|
|
|
|
vec_zero.ll
|
|
|
|
vec-loadsingles-alignment.ll
|
|
|
|
vec-trunc-store.ll
|
|
|
|
vector-bitreverse.ll
|
[x86] avoid printing unnecessary sign bits of hex immediates in asm comments (PR20347)
|
2016-05-28 14:58:37 +00:00 |
|
vector-blend.ll
|
[X86] Remove transformVSELECTtoBlendVECTOR_SHUFFLE
|
2016-05-16 18:27:00 +00:00 |
|
vector-compare-results.ll
|
|
|
|
vector-gep.ll
|
getelementptr instruction, support index vector of EVT.
|
2016-05-01 13:29:12 +00:00 |
|
vector-half-conversions.ll
|
|
|
|
vector-idiv-sdiv-128.ll
|
|
|
|
vector-idiv-sdiv-256.ll
|
|
|
|
vector-idiv-sdiv-512.ll
|
[x86] avoid printing unnecessary sign bits of hex immediates in asm comments (PR20347)
|
2016-05-28 14:58:37 +00:00 |
|
vector-idiv-udiv-128.ll
|
|
|
|
vector-idiv-udiv-256.ll
|
|
|
|
vector-idiv-udiv-512.ll
|
[X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
|
2016-05-07 01:11:17 +00:00 |
|
vector-idiv.ll
|
|
|
|
vector-intrinsics.ll
|
|
|
|
vector-lzcnt-128.ll
|
[X86][SSSE3] Lower vector CTLZ with PSHUFB lookups
|
2016-05-16 11:19:11 +00:00 |
|
vector-lzcnt-256.ll
|
[AVX512] Add patterns for VEXTRACT v16i16->v8i16 and v32i8->v16i8. Disable AVX2 versions of vector extract when AVX512VL is enabled.
|
2016-05-21 07:08:56 +00:00 |
|
vector-lzcnt-512.ll
|
|
|
|
vector-merge-store-fp-constants.ll
|
|
|
|
vector-pcmp.ll
|
|
|
|
vector-popcnt-128.ll
|
|
|
|
vector-popcnt-256.ll
|
|
|
|
vector-popcnt-512.ll
|
|
|
|
vector-rem.ll
|
remove some comments and other cruft from checks
|
2016-05-10 21:52:15 +00:00 |
|
vector-rotate-128.ll
|
|
|
|
vector-rotate-256.ll
|
[X86][AVX2] Fix v16i16 SHL lowering (PR27730)
|
2016-06-04 16:45:33 +00:00 |
|
vector-sext.ll
|
|
|
|
vector-shift-ashr-128.ll
|
|
|
|
vector-shift-ashr-256.ll
|
[X86][AVX2] Fix v16i16 SHL lowering (PR27730)
|
2016-06-04 16:45:33 +00:00 |
|
vector-shift-ashr-512.ll
|
[X86][AVX2] Fix v16i16 SHL lowering (PR27730)
|
2016-06-04 16:45:33 +00:00 |
|
vector-shift-lshr-128.ll
|
|
|
|
vector-shift-lshr-256.ll
|
[X86][AVX2] Fix v16i16 SHL lowering (PR27730)
|
2016-06-04 16:45:33 +00:00 |
|
vector-shift-lshr-512.ll
|
[X86][AVX2] Fix v16i16 SHL lowering (PR27730)
|
2016-06-04 16:45:33 +00:00 |
|
vector-shift-shl-128.ll
|
|
|
|
vector-shift-shl-256.ll
|
[X86][AVX2] Fix v16i16 SHL lowering (PR27730)
|
2016-06-04 16:45:33 +00:00 |
|
vector-shift-shl-512.ll
|
[X86][AVX2] Fix v16i16 SHL lowering (PR27730)
|
2016-06-04 16:45:33 +00:00 |
|
vector-shuffle-128-v2.ll
|
[AVX512] Add VLX 128/256-bit SET0 operations that encode to 128/256-bit EVEX encoded VPXORD so all 32 registers can be used.
|
2016-05-08 21:33:53 +00:00 |
|
vector-shuffle-128-v4.ll
|
|
|
|
vector-shuffle-128-v8.ll
|
|
|
|
vector-shuffle-128-v16.ll
|
|
|
|
vector-shuffle-256-v4.ll
|
|
|
|
vector-shuffle-256-v8.ll
|
[X86] No need to avoid selecting AVX_SET0 for 256-bit integer types when only AVX1 is supported. AVX_SET0 just expands to 256-bit VXORPS which is legal in AVX1.
|
2016-05-08 07:10:47 +00:00 |
|
vector-shuffle-256-v16.ll
|
[X86] Try to zero elts when lowering 256-bit shuffle with PSHUFB.
|
2016-05-28 14:38:04 +00:00 |
|
vector-shuffle-256-v32.ll
|
[X86] Try to zero elts when lowering 256-bit shuffle with PSHUFB.
|
2016-05-28 14:38:04 +00:00 |
|
vector-shuffle-512-v8.ll
|
[X86] Regenerate shuffle test
|
2016-05-11 13:57:15 +00:00 |
|
vector-shuffle-512-v16.ll
|
[X86][AVX512] Fixed issue with v16i32 shuffles lowering to VPALIGNR
|
2016-06-09 20:53:12 +00:00 |
|
vector-shuffle-512-v32.ll
|
[X86][AVX512] Added support for lowering 512-bit vector shuffles to bit/byte shifts
|
2016-06-09 20:13:58 +00:00 |
|
vector-shuffle-512-v64.ll
|
[X86][AVX512] Added avx512 VPSLLDQ/VPSRLDQ instruction comments
|
2016-06-09 22:03:15 +00:00 |
|
vector-shuffle-combining-avx2.ll
|
[X86][AVX2] Added 128-bit wide shuffle test
|
2016-05-02 19:46:58 +00:00 |
|
vector-shuffle-combining-avx512bw.ll
|
[X86][AVX] Generalized matching for target shuffle combines
|
2016-05-20 16:19:30 +00:00 |
|
vector-shuffle-combining-avx.ll
|
[X86][AVX] Generalized matching for target shuffle combines
|
2016-05-20 16:19:30 +00:00 |
|
vector-shuffle-combining-ssse3.ll
|
[X86][SSE] Added target shuffle combine to MOVQ
|
2016-05-03 15:05:13 +00:00 |
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vector-shuffle-combining-xop.ll
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[X86][SSE] Improved blend+zero target shuffle combining to use combined shuffle mask directly
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2016-06-07 12:20:14 +00:00 |
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vector-shuffle-combining.ll
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vector-shuffle-mmx.ll
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vector-shuffle-sse1.ll
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vector-shuffle-sse4a.ll
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vector-shuffle-v1.ll
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[X86] Bring consistent naming to the SSE/AVX and AVX512 PALIGNR instructions. Then add shuffle decode printing for the EVEX forms which is made easier by having the naming structure more similar to other instructions.
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2016-06-09 07:06:38 +00:00 |
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vector-shuffle-variable-128.ll
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[X86][SSE] Improved blend+zero target shuffle combining to use combined shuffle mask directly
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2016-06-07 12:20:14 +00:00 |
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vector-shuffle-variable-256.ll
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vector-trunc-math.ll
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vector-trunc.ll
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vector-tzcnt-128.ll
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[AVX512] Add VLX 128/256-bit SET0 operations that encode to 128/256-bit EVEX encoded VPXORD so all 32 registers can be used.
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2016-05-08 21:33:53 +00:00 |
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vector-tzcnt-256.ll
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[AVX512] Add VLX 128/256-bit SET0 operations that encode to 128/256-bit EVEX encoded VPXORD so all 32 registers can be used.
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2016-05-08 21:33:53 +00:00 |
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vector-tzcnt-512.ll
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vector-variable-idx2.ll
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vector-variable-idx.ll
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vector-zext.ll
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[X86][SSE] When lowering a 256-bit shuffle as PMOVZX, reduce the input vector to the lower 128-bit subvector.
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2016-05-26 15:40:36 +00:00 |
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vector-zmov.ll
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vector.ll
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vectorcall.ll
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version_directive.ll
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vfcmp.ll
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viabs.ll
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virtual-registers-cleared-in-machine-functions-liveins.ll
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visibility2.ll
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visibility.ll
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vmovq.ll
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volatile.ll
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vortex-bug.ll
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vselect-2.ll
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vselect-avx.ll
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vselect-minmax.ll
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vselect.ll
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vshift_scalar.ll
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vshift_split2.ll
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vshift_split.ll
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vshift-1.ll
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vshift-2.ll
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vshift-3.ll
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vshift-4.ll
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vshift-5.ll
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vshift-6.ll
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vsplit-and.ll
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vzero-excess.ll
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[x86, AVX] allow explicit calls to VZERO* to modify state in VZeroUpperInserter pass (PR27823)
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2016-05-25 16:39:47 +00:00 |
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warn-stack.ll
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weak_def_can_be_hidden.ll
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weak.ll
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webkit-jscc.ll
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wide-fma-contraction.ll
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wide-integer-cmp.ll
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wide-integer-fold.ll
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widen_arith-1.ll
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widen_arith-2.ll
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widen_arith-3.ll
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widen_arith-4.ll
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widen_arith-5.ll
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widen_arith-6.ll
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widen_bitops-0.ll
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widen_bitops-1.ll
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widen_cast-1.ll
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widen_cast-2.ll
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widen_cast-3.ll
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widen_cast-4.ll
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widen_cast-5.ll
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widen_cast-6.ll
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widen_compare-1.ll
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widen_conv-1.ll
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widen_conv-2.ll
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widen_conv-3.ll
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widen_conv-4.ll
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widen_conversions.ll
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widen_extract-1.ll
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widen_load-0.ll
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widen_load-1.ll
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widen_load-2.ll
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widen_shuffle-1.ll
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WidenArith.ll
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win32_sret.ll
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win32-eh-states.ll
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win32-eh.ll
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win32-pic-jumptable.ll
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win32-seh-catchpad-realign.ll
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win32-seh-catchpad.ll
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win32-seh-nested-finally.ll
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win32-spill-xmm.ll
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win64_alloca_dynalloca.ll
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win64_call_epi.ll
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win64_eh.ll
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win64_frame.ll
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win64_nonvol.ll
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win64_params.ll
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win64_sibcall.ll
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win64_vararg.ll
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win_chkstk.ll
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win_coreclr_chkstk.ll
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win_cst_pool.ll
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win-alloca-expander.ll
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Re-commit r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions"
|
2016-05-18 16:10:17 +00:00 |
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win-catchpad-csrs.ll
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win-catchpad-nested-cxx.ll
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win-catchpad-nested.ll
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win-catchpad-varargs.ll
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win-catchpad.ll
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win-cleanuppad.ll
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win-funclet-cfi.ll
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win-mixed-ehpersonality.ll
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windows-itanium-alloca.ll
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wineh-coreclr.ll
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wineh-exceptionpointer.ll
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wineh-no-ehpads.ll
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x32-function_pointer-1.ll
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x32-function_pointer-2.ll
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x32-function_pointer-3.ll
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x32-indirectbr.ll
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x32-landingpad.ll
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x32-lea-1.ll
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x32-va_start.ll
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x86_64-mul-by-const.ll
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x86-16.ll
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x86-32-intrcc.ll
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x86-32-vector-calling-conv.ll
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x86-64-and-mask.ll
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x86-64-arg.ll
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x86-64-asm.ll
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x86-64-baseptr.ll
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x86-64-call.ll
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x86-64-dead-stack-adjust.ll
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x86-64-disp.ll
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x86-64-double-precision-shift-left.ll
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x86-64-double-precision-shift-right.ll
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x86-64-double-shifts-Oz-Os-O2.ll
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x86-64-double-shifts-var.ll
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x86-64-extend-shift.ll
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x86-64-flags-intrinsics.ll
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x86-64-gv-offset.ll
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x86-64-intrcc.ll
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x86-64-jumps.ll
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x86-64-mem.ll
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x86-64-ms_abi-vararg.ll
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x86-64-pic-1.ll
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x86-64-pic-2.ll
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x86-64-pic-3.ll
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x86-64-pic-4.ll
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x86-64-pic-5.ll
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x86-64-pic-6.ll
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x86-64-pic-7.ll
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x86-64-pic-8.ll
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x86-64-pic-9.ll
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x86-64-pic-10.ll
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x86-64-pic-11.ll
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x86-64-pic.ll
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Fix shouldAssumeDSOLocal for private linkage.
|
2016-05-25 19:55:16 +00:00 |
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x86-64-plt-relative-reloc.ll
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x86-64-psub.ll
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x86-64-ptr-arg-simple.ll
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x86-64-ret0.ll
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x86-64-shortint.ll
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x86-64-sret-return-2.ll
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x86-64-sret-return.ll
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x86-64-stack-and-frame-ptr.ll
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Reapply [X86] Add a new LOW32_ADDR_ACCESS_RBP register class.
|
2016-05-09 19:01:46 +00:00 |
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x86-64-static-relo-movl.ll
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x86-64-tls-1.ll
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x86-64-varargs.ll
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x86-big-ret.ll
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x86-flags-intrinsics.ll
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x86-fold-pshufb.ll
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x86-framelowering-trap.ll
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x86-inline-asm-validation.ll
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x86-interrupt_cc.ll
|
Fixed the callee saved registers list for X86 AllRegs calling convention.
|
2016-05-12 19:58:32 +00:00 |
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x86-interrupt_cld.ll
|
Assure calling "cld" instruction in prologue of X86 interrupt handler function.
|
2016-05-13 12:46:57 +00:00 |
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x86-interrupt_vzeroupper.ll
|
[X86] Fix the AllRegs AVX calling convention.
|
2016-05-09 22:37:05 +00:00 |
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x86-mixed-alignment-dagcombine.ll
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x86-plt-relative-reloc.ll
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x86-repmov-copy-eflags.ll
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x86-sanitizer-shrink-wrapping.ll
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x86-setcc-int-to-fp-combine.ll
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x86-shifts.ll
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x86-shrink-wrap-unwind.ll
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x86-shrink-wrapping.ll
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x86-store-gv-addr.ll
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x86-upgrade-avx2-vbroadcast.ll
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x86-upgrade-avx-vbroadcast.ll
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x86-win64-shrink-wrapping.ll
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x87.ll
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xaluo.ll
|
[KNL] Fix UMULO lowering.
|
2016-06-06 12:24:52 +00:00 |
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xmm-r64.ll
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xmulo.ll
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xop-intrinsics-x86_64-upgrade.ll
|
[X86][XOP] Support for VPERMIL2PD/VPERMIL2PS 2-input shuffle instructions
|
2016-06-03 08:06:03 +00:00 |
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xop-intrinsics-x86_64.ll
|
[X86][XOP] Support for VPERMIL2PD/VPERMIL2PS 2-input shuffle instructions
|
2016-06-03 08:06:03 +00:00 |
|
xop-mask-comments.ll
|
[X86][XOP] Added VPERMIL2PD/VPERMIL2PS shuffle mask comment decoding
|
2016-06-04 21:44:28 +00:00 |
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xop-pcmov.ll
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xor-icmp.ll
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xor.ll
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xtest.ll
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zero-remat.ll
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zext-extract_subreg.ll
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zext-fold.ll
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zext-inreg-0.ll
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zext-inreg-1.ll
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zext-sext.ll
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zext-shl.ll
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zext-trunc.ll
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zlib-longest-match.ll
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|
