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1df6d33c5e
test - we only care that there are two moves in the loop and not which part is relative to which register anyhow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231191 91177308-0d34-0410-b5e6-96231b3b80d8
85 lines
2.8 KiB
LLVM
85 lines
2.8 KiB
LLVM
; RUN: llc < %s -march=x86-64 -relocation-model=pic | FileCheck %s
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; This test is to ensure the TwoAddrInstruction pass chooses the proper operands to
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; merge and generates fewer mov insns.
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@M = common global i32 0, align 4
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@total = common global i32 0, align 4
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@g = common global i32 0, align 4
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; Function Attrs: nounwind uwtable
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define void @foo() {
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entry:
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%0 = load i32, i32* @M, align 4
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%cmp3 = icmp sgt i32 %0, 0
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br i1 %cmp3, label %for.body.lr.ph, label %for.end
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for.body.lr.ph: ; preds = %entry
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%total.promoted = load i32, i32* @total, align 4
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br label %for.body
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; Check that only one mov will be generated in the kernel loop.
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; CHECK-LABEL: foo:
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; CHECK: [[LOOP1:^[a-zA-Z0-9_.]+]]: {{#.*}} %for.body
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; CHECK-NOT: mov
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; CHECK: movl {{.*}}, [[REG1:%[a-z0-9]+]]
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; CHECK-NOT: mov
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; CHECK: shrl $31, [[REG1]]
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; CHECK-NOT: mov
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; CHECK: jl [[LOOP1]]
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for.body: ; preds = %for.body.lr.ph, %for.body
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%add5 = phi i32 [ %total.promoted, %for.body.lr.ph ], [ %add, %for.body ]
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%i.04 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
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%div = sdiv i32 %i.04, 2
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%add = add nsw i32 %div, %add5
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%inc = add nuw nsw i32 %i.04, 1
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%cmp = icmp slt i32 %inc, %0
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br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge
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for.cond.for.end_crit_edge: ; preds = %for.body
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store i32 %add, i32* @total, align 4
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br label %for.end
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for.end: ; preds = %for.cond.for.end_crit_edge, %entry
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ret void
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}
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; Function Attrs: nounwind uwtable
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define void @goo() {
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entry:
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%0 = load i32, i32* @M, align 4
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%cmp3 = icmp sgt i32 %0, 0
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br i1 %cmp3, label %for.body.lr.ph, label %for.end
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for.body.lr.ph: ; preds = %entry
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%total.promoted = load i32, i32* @total, align 4
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br label %for.body
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; Check that only two mov will be generated in the kernel loop.
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; CHECK-LABEL: goo:
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; CHECK: [[LOOP2:^[a-zA-Z0-9_.]+]]: {{#.*}} %for.body
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; CHECK-NOT: mov
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; CHECK: movl {{.*}}, [[REG2:%[a-z0-9]+]]
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; CHECK-NOT: mov
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; CHECK: shrl $31, [[REG2]]
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; CHECK-NOT: mov
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; CHECK: movl {{.*}}
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; CHECK: jl [[LOOP2]]
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for.body: ; preds = %for.body.lr.ph, %for.body
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%add5 = phi i32 [ %total.promoted, %for.body.lr.ph ], [ %add, %for.body ]
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%i.04 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
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%div = sdiv i32 %i.04, 2
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%add = add nsw i32 %div, %add5
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store volatile i32 %add, i32* @g, align 4
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%inc = add nuw nsw i32 %i.04, 1
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%cmp = icmp slt i32 %inc, %0
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br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge
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for.cond.for.end_crit_edge: ; preds = %for.body
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store i32 %add, i32* @total, align 4
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br label %for.end
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for.end: ; preds = %for.cond.for.end_crit_edge, %entry
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ret void
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}
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