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llvm/test/Analysis/CostModel/X86
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Simon Pilgrim 7cb9be5d19 [CostModel][X86] Add CTLZ scalar costs 
Add specific scalar costs for CTLZ instructions, we can't discriminate between CTLZ and CTLZ_ZERO_UNDEF so we have to assume the worst. Given how BSR is often a microcoded nightmare on some older targets we might still be underestimating it.

For targets supporting LZCNT (Intel Haswell+ or AMD Fam10+), we provide overrides that assume 1cy costs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@374786 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-14 16:30:17 +00:00
..
aggregates.ll
[CostModel] Model all extractvalues as free.
2019-08-29 11:50:30 +00:00
alternate-shuffle-cost.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
arith-fix.ll
[Cost][X86] Add v2i64 truncation costs
2019-09-22 12:04:38 +00:00
arith-fma.ll
[CostModel][X86] Split fma arith costs tests from other fp tests
2018-04-13 19:12:32 +00:00
arith-fp.ll
[CostModel] Add really basic support for being able to query the cost of the FNeg instruction.
2019-05-28 04:09:18 +00:00
arith-overflow.ll
[CostModel][X86] Fix SLM <2 x i64> icmp costs
2019-09-26 10:14:38 +00:00
arith-ssat.ll
[CostModel][X86] Fix SLM <2 x i64> icmp costs
2019-09-26 10:14:38 +00:00
arith-usat.ll
[CostModel][X86] Fix SLM <2 x i64> icmp costs
2019-09-26 10:14:38 +00:00
arith.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
bitreverse.ll
[CostModel][X86] Regenerate bswap/bitreverse cost tests with update_analyze_test_checks.py
2018-04-06 15:46:26 +00:00
bswap.ll
[CostModel][X86] Regenerate bswap/bitreverse cost tests with update_analyze_test_checks.py
2018-04-06 15:46:26 +00:00
cast.ll
[Cost][X86] Add v2i64 truncation costs
2019-09-22 12:04:38 +00:00
costmodel.ll
[CostModel][X86] Regenerate latency/codesize cost tests
2018-04-13 18:56:58 +00:00
ctlz.ll
[CostModel][X86] Add CTLZ scalar costs
2019-10-14 16:30:17 +00:00
ctpop.ll
[CostModel][X86] Add CTPOP scalar costs (PR43656)
2019-10-14 14:07:43 +00:00
cttz.ll
[CostModel][X86] Regenerate bit count cost tests with update_analyze_test_checks.py
2018-04-06 16:14:27 +00:00
div.ll
[CostModel][X86] Add vXi8 vector division by constants costs.
2018-10-24 18:44:12 +00:00
extend.ll
[CostModel][X86] Add scalar sext/zext cost tests
2019-09-02 21:02:51 +00:00
fcmp.ll
[CostModel][X86] Add explicit fcmp costs for pre-SSE42 targets
2019-01-20 13:21:43 +00:00
fptosi.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
fptoui.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
fround.ll
[CostModel][X86] Add cost tests for fp rounding intrinsics
2018-07-02 17:07:01 +00:00
fshl.ll
[CostModel][X86] Fix SLM <2 x i64> icmp costs
2019-09-26 10:14:38 +00:00
fshr.ll
[CostModel][X86] Fix SLM <2 x i64> icmp costs
2019-09-26 10:14:38 +00:00
gep.ll
Check for overflows when calculating the offset in GetGEPCost.
2017-09-27 23:16:56 +00:00
i32.ll
We are not ready to estimate the cost of integer expansions based on the number of parts. This test is too noisy.
2012-12-23 09:11:07 +00:00
icmp.ll
[CostModel][X86] Fix SLM <2 x i64> icmp costs
2019-09-26 10:14:38 +00:00
insert-extract-at-zero.ll
Cost Model: Normalize the insert/extract index when splitting types
2012-11-05 21:12:13 +00:00
interleave-load-i32.ll
[X86] Replace '-mcpu=skx' with -mattr=avx512f or -mattr=avx512bw in interleave/strided load/store cost model tests.
2018-12-01 00:21:49 +00:00
interleave-store-i32.ll
[X86] Replace '-mcpu=skx' with -mattr=avx512f or -mattr=avx512bw in interleave/strided load/store cost model tests.
2018-12-01 00:21:49 +00:00
interleaved-load-float.ll
[LV][X86] update the cost of interleaving mem. access of floats
2017-11-06 10:56:20 +00:00
interleaved-load-i8.ll
[AVX512][AVX2]Cost calculation for interleave load/store patterns {v8i8,v16i8,v32i8,v64i8}
2017-10-18 11:41:55 +00:00
interleaved-load-store-double.ll
[TTI][X86] update costs of interleaved load\store of i64\double
2017-11-16 09:38:32 +00:00
interleaved-load-store-i64.ll
[TTI][X86] update costs of interleaved load\store of i64\double
2017-11-16 09:38:32 +00:00
interleaved-store-i8.ll
[AVX512][AVX2]Cost calculation for interleave load/store patterns {v8i8,v16i8,v32i8,v64i8}
2017-10-18 11:41:55 +00:00
intrinsic-cost.ll
[X86][SSE] Reduce FADD/FSUB/FMUL costs on later targets (PR36280)
2018-02-26 22:10:17 +00:00
lit.local.cfg
[lit] Delete empty lines at the end of lit.local.cfg NFC
2019-06-17 09:51:07 +00:00
load_store.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
loop_v2.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
masked-intrinsic-cost.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
min-legal-vector-width.ll
[X86][CostModel] Adjust the costs of ZERO_EXTEND/SIGN_EXTEND with less than 128-bit inputs
2019-08-14 14:52:39 +00:00
reduce-add.ll
[CostModel][X86] Improve sum reduction costs.
2019-10-12 13:21:50 +00:00
reduce-and.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
reduce-mul.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
reduce-or.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
reduce-smax.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
reduce-smin.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
reduce-umax.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
reduce-umin.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
reduce-xor.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
reduction.ll
[CostModel][X86] Improve sum reduction costs.
2019-10-12 13:21:50 +00:00
rem.ll
[CostModel][X86] Add vXi8 vector division by constants costs.
2018-10-24 18:44:12 +00:00
scalarize.ll
[X86][SSE] Add initial costs for vector CTTZ/CTLZ
2016-08-04 10:51:41 +00:00
shuffle-broadcast.ll
[CostModel] Recognise BROADCAST shuffle mask if the elements come from the second src
2018-06-13 16:52:02 +00:00
shuffle-extract_subvector.ll
[X86] Improve cost model for subvector extraction of less than 128-bit vectors
2019-08-15 17:29:42 +00:00
shuffle-insert_subvector.ll
[CostModel][X86] Add some initial extract/insert subvector shuffle cost tests
2018-10-20 17:38:33 +00:00
shuffle-reverse.ll
[CostModel] Recognise REVERSE shuffle mask if the elements come from the second src
2018-06-14 09:35:00 +00:00
shuffle-single-src.ll
[X86][AVX] Reduce v4f64/v4i64 shuffle costs (PR37882)
2018-06-21 11:37:13 +00:00
shuffle-transpose.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
shuffle-two-src.ll
[X86][AVX] Reduce v4f64/v4i64 shuffle costs (PR37882)
2018-06-21 11:37:13 +00:00
sitofp.ll
[X86] Lower the cost of v2i32->v2f64 sint_to_fp under vector widening legalization.
2019-08-22 08:18:45 +00:00
slm-arith-costs.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
sse-itoi.ll
[CostModel][X86] Regenerate integer extension/truncation cost tests with update_analyze_test_checks.py
2018-04-06 15:28:26 +00:00
strided-load-i8.ll
[X86] Replace '-mcpu=skx' with -mattr=avx512f or -mattr=avx512bw in interleave/strided load/store cost model tests.
2018-12-01 00:21:49 +00:00
strided-load-i16.ll
[X86] Replace '-mcpu=skx' with -mattr=avx512f or -mattr=avx512bw in interleave/strided load/store cost model tests.
2018-12-01 00:21:49 +00:00
strided-load-i32.ll
[X86] Replace '-mcpu=skx' with -mattr=avx512f or -mattr=avx512bw in interleave/strided load/store cost model tests.
2018-12-01 00:21:49 +00:00
strided-load-i64.ll
[X86] Replace '-mcpu=skx' with -mattr=avx512f or -mattr=avx512bw in interleave/strided load/store cost model tests.
2018-12-01 00:21:49 +00:00
testshiftashr.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
testshiftlshr.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
testshiftshl.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
tiny.ll
Cost Model: change the default cost of control flow instructions (br / ret / ...) to zero.
2012-12-05 21:21:26 +00:00
trunc.ll
[Cost][X86] Add more missing vector truncation costs
2019-09-22 16:46:15 +00:00
uitofp.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
uniformshift.ll
[LV, X86] Be more optimistic about vectorizing shifts.
2016-08-04 22:48:03 +00:00
vdiv-cost.ll
[CostModel][X86] Add vXi8 vector division by constants costs.
2018-10-24 18:44:12 +00:00
vector_gep.ll
Revert r314923: "Recommit : Use the basic cost if a GEP is not used as addressing mode"
2017-10-13 14:04:21 +00:00
vector-extract.ll
[CostModel][X86] Add tests for extractelement from non-immediate vector element indices
2019-10-09 12:36:22 +00:00
vector-insert.ll
[CostModel][X86] Add tests for insertelement to non-immediate vector element indices
2019-10-09 12:36:34 +00:00
vectorized-loop.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vselect-cost.ll
[CostModel][X86] Add explicit vector select costs
2019-01-20 13:55:01 +00:00
vshift-ashr-cost.ll
[CostModel][X86] Fix constant vector XOP rights shifts
2018-11-13 16:40:10 +00:00
vshift-lshr-cost.ll
[CostModel][X86] Fix constant vector XOP rights shifts
2018-11-13 16:40:10 +00:00
vshift-shl-cost.ll
[CostModel][X86] Split off BtVer2 cost checks
2018-04-20 13:50:33 +00:00