mirror of
https://github.com/RPCS3/llvm.git
synced 2024-12-28 23:43:50 +00:00
8b2b8a1835
This update was done with the following bash script:
find test/CodeGen -name "*.ll" | \
while read NAME; do
echo "$NAME"
if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
while read FUNC; do
sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
done
sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
mv $TEMP $NAME
fi
done
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
58 lines
1.5 KiB
LLVM
58 lines
1.5 KiB
LLVM
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
|
|
|
|
define i64 @ror_i64(i64 %in) {
|
|
; CHECK-LABEL: ror_i64:
|
|
%left = shl i64 %in, 19
|
|
%right = lshr i64 %in, 45
|
|
%val5 = or i64 %left, %right
|
|
; CHECK: extr {{x[0-9]+}}, x0, x0, #45
|
|
ret i64 %val5
|
|
}
|
|
|
|
define i32 @ror_i32(i32 %in) {
|
|
; CHECK-LABEL: ror_i32:
|
|
%left = shl i32 %in, 9
|
|
%right = lshr i32 %in, 23
|
|
%val5 = or i32 %left, %right
|
|
; CHECK: extr {{w[0-9]+}}, w0, w0, #23
|
|
ret i32 %val5
|
|
}
|
|
|
|
define i32 @extr_i32(i32 %lhs, i32 %rhs) {
|
|
; CHECK-LABEL: extr_i32:
|
|
%left = shl i32 %lhs, 6
|
|
%right = lshr i32 %rhs, 26
|
|
%val = or i32 %left, %right
|
|
; Order of lhs and rhs matters here. Regalloc would have to be very odd to use
|
|
; something other than w0 and w1.
|
|
; CHECK: extr {{w[0-9]+}}, w0, w1, #26
|
|
|
|
ret i32 %val
|
|
}
|
|
|
|
define i64 @extr_i64(i64 %lhs, i64 %rhs) {
|
|
; CHECK-LABEL: extr_i64:
|
|
%right = lshr i64 %rhs, 40
|
|
%left = shl i64 %lhs, 24
|
|
%val = or i64 %right, %left
|
|
; Order of lhs and rhs matters here. Regalloc would have to be very odd to use
|
|
; something other than w0 and w1.
|
|
; CHECK: extr {{x[0-9]+}}, x0, x1, #40
|
|
|
|
ret i64 %val
|
|
}
|
|
|
|
; Regression test: a bad experimental pattern crept into git which optimised
|
|
; this pattern to a single EXTR.
|
|
define i32 @extr_regress(i32 %a, i32 %b) {
|
|
; CHECK-LABEL: extr_regress:
|
|
|
|
%sh1 = shl i32 %a, 14
|
|
%sh2 = lshr i32 %b, 14
|
|
%val = or i32 %sh2, %sh1
|
|
; CHECK-NOT: extr {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, #{{[0-9]+}}
|
|
|
|
ret i32 %val
|
|
; CHECK: ret
|
|
}
|