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91bceea7d984ea0855e98fefd82cd1794de1ce73
llvm/test/MC/Mips/mips5
T
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Simon Dardis 962d3674b2 [mips] Add instruction aliases for ds(r|l)l.
Add the instruction aliases for ds(r|l)l for the two operand alias
of ds(r|l)lv and the aliases ds(r|l)l with the three register operands.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306405 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-27 13:35:17 +00:00
..
invalid-mips32.s
[mips] Fix sync instruction definition
2016-10-18 14:42:13 +00:00
invalid-mips32r2.s
[mips] Marked the DI/EI instruction aliases as MIPS32r2
2014-10-16 15:23:52 +00:00
invalid-mips64.s
[mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register with Hazard Barrier).
2014-06-11 15:05:56 +00:00
invalid-mips64r2-xfail.s
[mips] Test that IAS for -mcpu=mips5 does not accept MIPS64 insns and -mcpu=mips(5|64) does not accept MIPS64r2
2014-05-14 15:35:03 +00:00
invalid-mips64r2.s
[MIPS]Multiple and add instructions for Mips are currently available in mips32r2/mips64r2 and later but should also be available in mips4, mips5, and mips64. This patch fixes the requested features and updates the corresponding test files.
2015-02-25 15:24:37 +00:00
valid-xfail.s
[mips] Correct c.cond.fmt instruction definition.
2017-01-16 13:55:58 +00:00
valid.s
[mips] Add instruction aliases for ds(r|l)l.
2017-06-27 13:35:17 +00:00
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