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908c0c01f6
I was too optimistic, inline asm can have tied operands that don't follow the def order. Fixes PR13742. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162998 91177308-0d34-0410-b5e6-96231b3b80d8
31 lines
1.2 KiB
LLVM
31 lines
1.2 KiB
LLVM
; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 -optimize-regalloc -regalloc=basic | FileCheck %s
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; rdar://6992609
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; CHECK: movl [[EDX:%e..]], 4(%esp)
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; CHECK: movl [[EDX]], 4(%esp)
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target triple = "i386-apple-darwin9.0"
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@llvm.used = appending global [1 x i8*] [i8* bitcast (i64 (i64)* @_OSSwapInt64 to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
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define i64 @_OSSwapInt64(i64 %_data) nounwind {
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entry:
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%retval = alloca i64 ; <i64*> [#uses=2]
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%_data.addr = alloca i64 ; <i64*> [#uses=4]
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store i64 %_data, i64* %_data.addr
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%tmp = load i64* %_data.addr ; <i64> [#uses=1]
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%0 = call i64 asm "bswap %eax\0A\09bswap %edx\0A\09xchgl %eax, %edx", "=A,0,~{dirflag},~{fpsr},~{flags}"(i64 %tmp) nounwind ; <i64> [#uses=1]
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store i64 %0, i64* %_data.addr
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%tmp1 = load i64* %_data.addr ; <i64> [#uses=1]
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store i64 %tmp1, i64* %retval
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%1 = load i64* %retval ; <i64> [#uses=1]
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ret i64 %1
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}
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; The tied operands are not necessarily in the same order as the defs.
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; PR13742
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define i64 @swapped(i64 %x, i64 %y) nounwind {
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entry:
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%x0 = call { i64, i64 } asm "foo", "=r,=r,1,0,~{dirflag},~{fpsr},~{flags}"(i64 %x, i64 %y) nounwind
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%x1 = extractvalue { i64, i64 } %x0, 0
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ret i64 %x1
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}
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