Vincent Lejeune dfef7cbfc6 R600: add a pass that merges clauses. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191790 91177308-0d34-0410-b5e6-96231b3b80d8		2013-10-01 19:32:58 +00:00
..
AArch64	llvm/test/CodeGen/AArch64/neon-scalar-reduce-pairwise.ll: Use -mtriple here, or aach64-pecoff might be misassumed on win32 hosts.	2013-09-24 04:14:29 +00:00
ARM	ARM: support interrupt attribute	2013-10-01 14:33:28 +00:00
CPP
Generic
Hexagon	TBAA: remove !tbaa from testing cases when they are not needed.	2013-09-30 18:17:35 +00:00
Inputs
Mips	[mips][msa] Added support for matching mod_[us] from normal IR (i.e. not intrinsics)	2013-10-01 10:22:35 +00:00
MSP430
NVPTX	[NVPTX] Make constant vector test case endian-independent	2013-09-19 13:14:44 +00:00
PowerPC	TBAA: update tbaa format from scalar format to struct-path aware format.	2013-09-30 18:17:55 +00:00
R600	R600: add a pass that merges clauses.	2013-10-01 19:32:58 +00:00
SPARC	TBAA: update tbaa format from scalar format to struct-path aware format.	2013-09-30 18:17:55 +00:00
SystemZ	[SystemZ] Add comparisons of high words and memory	2013-10-01 15:00:44 +00:00
Thumb
Thumb2	Fix spelling intruction -> instruction.	2013-09-28 11:46:15 +00:00
X86	Add test case for PR16785.	2013-10-01 17:02:48 +00:00
XCore