llvm/MC at 949c910fb3198ff792afea2995e6505579a55132 - llvm

RPCS3/llvm

mirror of https://github.com/RPCS3/llvm.git synced 2025-02-11 13:29:36 +00:00

History

Owen Anderson 7a25825033 Unlike a lot of NEON instructions, vext isn't _actually_ parameterized by element size. Instead,

all of the different element sizes are pseudo instructions that map down to vext.8 underneath, with
the immediate shifted left to reflect the increased element size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118183 91177308-0d34-0410-b5e6-96231b3b80d8

2010-11-03 18:16:27 +00:00

ARM

Unlike a lot of NEON instructions, vext isn't _actually_ parameterized by element size. Instead,

2010-11-03 18:16:27 +00:00

AsmParser

Add support for .value.

2010-11-01 15:29:07 +00:00

COFF

Unbreak test on non-COFF targets.

2010-10-16 11:27:13 +00:00

Disassembler

chase owen.