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https://github.com/RPCS3/llvm.git
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Florian Hahn
95265ffb1f
As preparation for LoopInterchange becoming a loop pass, it needs to preserve ScalarEvolution. Even though interchanging should not change the trip count of the loop, it modifies loop entry, latch and exit blocks. I added -verify-scev to some loop interchange tests, but the verification does not catch problems caused by missing invalidation of SE in loop interchange, as the trip counts themselves do not change. So there might be potential to make the SE verification covering more stuff in the future. Reviewers: mkazantsev, efriedma, karthikthecool Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D52026 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342209 91177308-0d34-0410-b5e6-96231b3b80d8
103 lines
4.6 KiB
LLVM
103 lines
4.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -loop-interchange -verify-dom-info -verify-loop-info -verify-scev -S 2>&1 | FileCheck %s
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;; Checks the order of the inner phi nodes does not cause havoc.
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;; The inner loop has a reduction into c. The IV is not the first phi.
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target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "armv8--linux-gnueabihf"
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; Function Attrs: norecurse nounwind
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define void @test(i32 %T, [90 x i32]* noalias nocapture %C, i16* noalias nocapture readonly %A, i16* noalias nocapture readonly %B) local_unnamed_addr #0 {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR3_PREHEADER:%.*]]
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; CHECK: for1.header.preheader:
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; CHECK-NEXT: br label [[FOR1_HEADER:%.*]]
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; CHECK: for1.header:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INC20:%.*]], [[FOR1_INC19:%.*]] ], [ 0, [[FOR1_HEADER_PREHEADER:%.*]] ]
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; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[I]], 90
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; CHECK-NEXT: br label [[FOR2_HEADER_PREHEADER:%.*]]
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; CHECK: for2.header.preheader:
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; CHECK-NEXT: br label [[FOR2_HEADER:%.*]]
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; CHECK: for2.header:
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; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[INC17:%.*]], [[FOR2_INC16:%.*]] ], [ 0, [[FOR2_HEADER_PREHEADER]] ]
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; CHECK-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [90 x i32], [90 x i32]* [[C:%.*]], i32 [[I]], i32 [[J]]
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; CHECK-NEXT: [[ARRAYIDX14_PROMOTED:%.*]] = load i32, i32* [[ARRAYIDX14]], align 4
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; CHECK-NEXT: br label [[FOR3_SPLIT1:%.*]]
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; CHECK: for3.preheader:
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; CHECK-NEXT: br label [[FOR3:%.*]]
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; CHECK: for3:
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; CHECK-NEXT: [[K:%.*]] = phi i32 [ [[INC:%.*]], [[FOR3_SPLIT:%.*]] ], [ 1, [[FOR3_PREHEADER]] ]
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; CHECK-NEXT: br label [[FOR1_HEADER_PREHEADER]]
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; CHECK: for3.split1:
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[K]], [[MUL]]
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[A:%.*]], i32 [[ADD]]
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; CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
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; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP0]] to i32
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; CHECK-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV]], [[ARRAYIDX14_PROMOTED]]
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; CHECK-NEXT: br label [[FOR2_INC16]]
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; CHECK: for3.split:
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; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[K]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 90
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR1_LOOPEXIT:%.*]], label [[FOR3]]
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; CHECK: for2.inc16:
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; CHECK-NEXT: store i32 [[ADD15]], i32* [[ARRAYIDX14]], align 4
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; CHECK-NEXT: [[INC17]] = add nuw nsw i32 [[J]], 1
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; CHECK-NEXT: [[EXITCOND47:%.*]] = icmp eq i32 [[INC17]], 90
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; CHECK-NEXT: br i1 [[EXITCOND47]], label [[FOR1_INC19]], label [[FOR2_HEADER]]
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; CHECK: for1.inc19:
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; CHECK-NEXT: [[INC20]] = add nuw nsw i32 [[I]], 1
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; CHECK-NEXT: [[EXITCOND48:%.*]] = icmp eq i32 [[INC20]], 90
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; CHECK-NEXT: br i1 [[EXITCOND48]], label [[FOR3_SPLIT]], label [[FOR1_HEADER]]
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; CHECK: for1.loopexit:
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for1.header
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for1.header: ; preds = %entry
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%i = phi i32 [ %inc20, %for1.inc19 ], [ 0, %entry ]
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%mul = mul nsw i32 %i, 90
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br label %for2.header
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for2.header: ; preds = %for2.inc16, %for1.header
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%j = phi i32 [ 0, %for1.header ], [ %inc17, %for2.inc16 ]
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%arrayidx14 = getelementptr inbounds [90 x i32], [90 x i32]* %C, i32 %i, i32 %j
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%arrayidx14.promoted = load i32, i32* %arrayidx14, align 4
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br label %for3
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for3: ; preds = %for3, %for2.header
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%add1541 = phi i32 [ %arrayidx14.promoted, %for2.header ], [ %add15, %for3 ]
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%k = phi i32 [ 1, %for2.header ], [ %inc, %for3 ]
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%add = add nsw i32 %k, %mul
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%arrayidx = getelementptr inbounds i16, i16* %A, i32 %add
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%0 = load i16, i16* %arrayidx, align 2
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%conv = sext i16 %0 to i32
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%add15 = add nsw i32 %conv, %add1541
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%inc = add nuw nsw i32 %k, 1
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%exitcond = icmp eq i32 %inc, 90
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br i1 %exitcond, label %for2.inc16, label %for3
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for2.inc16: ; preds = %for.body6
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%add15.lcssa = phi i32 [ %add15, %for3 ]
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store i32 %add15.lcssa, i32* %arrayidx14, align 4
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%inc17 = add nuw nsw i32 %j, 1
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%exitcond47 = icmp eq i32 %inc17, 90
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br i1 %exitcond47, label %for1.inc19, label %for2.header
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for1.inc19: ; preds = %for2.inc16
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%inc20 = add nuw nsw i32 %i, 1
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%exitcond48 = icmp eq i32 %inc20, 90
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br i1 %exitcond48, label %for1.loopexit, label %for1.header
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for1.loopexit: ; preds = %for1.inc19
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br label %exit
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exit: ; preds = %for1.loopexit
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ret void
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}
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