llvm/lib at 965b20e39c7fd73846e9b6ed55ba90e032ae3b1b - llvm

RPCS3/llvm

mirror of https://github.com/RPCS3/llvm.git synced 2025-01-15 06:18:50 +00:00

History

Ulrich Weigand 965b20e39c [PowerPC] Always use mfocrf if available

When accessing just a single CR register, it is always preferable to
use mfocrf instead of mfcr, if the former is available on the CPU.

Current code makes that distinction in many, but not all places
where a single CR register value is retrieved.  One missing
location is PPCRegisterInfo::lowerCRSpilling.

To fix this and make this simpler in the future, this patch changes
the bulk of the back-end to always assume mfocrf is available and
simply generate it when needed.

On machines that actually do not support mfocrf, the instruction
is replaced by mfcr at the very end, in EmitInstruction.

This has the additional benefit that we no longer need the
MFCRpseud hack, since before EmitInstruction we always have
a MFOCRF instruction pattern, which already models data flow
as required.

The patch also adds the MFOCRF8 version of the instruction,
which was missing so far.

Except for the PPCRegisterInfo::lowerCRSpilling case, no change
in generated code intended.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185556 91177308-0d34-0410-b5e6-96231b3b80d8

2013-07-03 17:05:42 +00:00

Analysis

Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size.

2013-07-03 15:07:05 +00:00

AsmParser

Added support for the Builtin attribute.

2013-06-27 00:25:01 +00:00

Bitcode

Remove the Copied parameter from MemoryObject::readBytes.

2013-05-24 10:54:58 +00:00

CodeGen

Remove unused field.