Evan Cheng 4e54480531 Add x86 isel lowering logic to form bit test with inverted condition. e.g. ...

x ^ -1.

Patch by David Majnemer.
rdar://12755626


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169339 91177308-0d34-0410-b5e6-96231b3b80d8

2012-12-05 00:10:38 +00:00

..

ARM

ARM custom lower ctpop for vector types. Patch by Pete Couperus.

2012-12-04 22:41:50 +00:00

CPP

test commit

2012-07-18 17:53:05 +00:00

Generic

Codegen support for arbitrary vector getelementptrs.

2012-11-13 13:01:58 +00:00

Hexagon

test/CodeGen/Hexagon/postinc-load.ll: Suppress it for now. It triggered the failure on i686 hosts.

2012-11-14 22:22:37 +00:00

MBlaze

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

Mips

[mips] Generate big GOT code.

2012-11-21 20:40:38 +00:00

MSP430

Add support for varargs functions for msp430.

2012-11-21 17:28:27 +00:00

NVPTX

Teach the legalizer how to handle operands for VSELECT nodes

2012-11-29 14:26:28 +00:00

PowerPC

This patch introduces initial-exec model support for thread-local storage

2012-12-04 16:18:08 +00:00

SPARC

Use TargetTransformInfo to control switch-to-lookup table transformation

2012-10-30 11:23:25 +00:00

Thumb

Use the 'count' attribute to calculate the upper bound of an array.

2012-12-04 21:34:03 +00:00

Thumb2

Add GPRPair Register class to ARM.

2012-10-26 21:29:15 +00:00

X86

Add x86 isel lowering logic to form bit test with inverted condition. e.g.

2012-12-05 00:10:38 +00:00

XCore

Fix handling of aliases to functions.

2012-11-16 21:12:38 +00:00