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98a9b72e8c
Sorry for the unit test churn. I'll try to make the change permanently next time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184705 91177308-0d34-0410-b5e6-96231b3b80d8
56 lines
1.9 KiB
LLVM
56 lines
1.9 KiB
LLVM
; RUN: llc -mtriple=x86_64-linux -mcpu=nehalem < %s | FileCheck %s --check-prefix=LIN
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; RUN: llc -mtriple=x86_64-win32 -mcpu=nehalem < %s | FileCheck %s --check-prefix=WIN
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; rdar://7398554
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; When doing vector gather-scatter index calculation with 32-bit indices,
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; bounce the vector off of cache rather than shuffling each individual
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; element out of the index vector.
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; CHECK: foo:
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; LIN: movaps (%rsi), %xmm0
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; LIN: andps (%rdx), %xmm0
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; LIN: movaps %xmm0, -24(%rsp)
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; LIN: movslq -24(%rsp), %rsi
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; LIN: movslq -20(%rsp), %rcx
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; LIN: movslq -16(%rsp), %rdx
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; LIN: movslq -12(%rsp), %rax
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; LIN: movsd (%rdi,%rsi,8), %xmm0
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; LIN: movhpd (%rdi,%rcx,8), %xmm0
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; LIN: movsd (%rdi,%rdx,8), %xmm1
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; LIN: movhpd (%rdi,%rax,8), %xmm1
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; WIN: movaps (%rdx), %xmm0
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; WIN: andps (%r8), %xmm0
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; WIN: movaps %xmm0, (%rsp)
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; WIN: movslq (%rsp), %rax
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; WIN: movslq 4(%rsp), %rdx
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; WIN: movslq 8(%rsp), %r9
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; WIN: movslq 12(%rsp), %r8
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; WIN: movsd (%rcx,%rax,8), %xmm0
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; WIN: movhpd (%rcx,%rdx,8), %xmm0
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; WIN: movsd (%rcx,%r9,8), %xmm1
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; WIN: movhpd (%rcx,%r8,8), %xmm1
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define <4 x double> @foo(double* %p, <4 x i32>* %i, <4 x i32>* %h) nounwind {
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%a = load <4 x i32>* %i
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%b = load <4 x i32>* %h
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%j = and <4 x i32> %a, %b
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%d0 = extractelement <4 x i32> %j, i32 0
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%d1 = extractelement <4 x i32> %j, i32 1
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%d2 = extractelement <4 x i32> %j, i32 2
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%d3 = extractelement <4 x i32> %j, i32 3
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%q0 = getelementptr double* %p, i32 %d0
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%q1 = getelementptr double* %p, i32 %d1
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%q2 = getelementptr double* %p, i32 %d2
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%q3 = getelementptr double* %p, i32 %d3
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%r0 = load double* %q0
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%r1 = load double* %q1
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%r2 = load double* %q2
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%r3 = load double* %q3
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%v0 = insertelement <4 x double> undef, double %r0, i32 0
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%v1 = insertelement <4 x double> %v0, double %r1, i32 1
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%v2 = insertelement <4 x double> %v1, double %r2, i32 2
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%v3 = insertelement <4 x double> %v2, double %r3, i32 3
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ret <4 x double> %v3
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}
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