mirror of
https://github.com/RPCS3/llvm.git
synced 2024-12-23 20:45:06 +00:00
29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
37 lines
878 B
LLVM
37 lines
878 B
LLVM
; RUN: llc < %s -march=arm64 | FileCheck %s
|
|
|
|
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
|
|
target triple = "arm64-apple-ios7.0.0"
|
|
|
|
; Function Attrs: nounwind readnone
|
|
declare i32 @llvm.ctlz.i32(i32, i1) #0
|
|
declare i64 @llvm.ctlz.i64(i64, i1) #1
|
|
|
|
; Function Attrs: nounwind ssp
|
|
define i32 @clrsb32(i32 %x) #2 {
|
|
entry:
|
|
%shr = ashr i32 %x, 31
|
|
%xor = xor i32 %shr, %x
|
|
%mul = shl i32 %xor, 1
|
|
%add = or i32 %mul, 1
|
|
%0 = tail call i32 @llvm.ctlz.i32(i32 %add, i1 false)
|
|
|
|
ret i32 %0
|
|
; CHECK-LABEL: clrsb32
|
|
; CHECK: cls [[TEMP:w[0-9]+]], [[TEMP]]
|
|
}
|
|
|
|
; Function Attrs: nounwind ssp
|
|
define i64 @clrsb64(i64 %x) #3 {
|
|
entry:
|
|
%shr = ashr i64 %x, 63
|
|
%xor = xor i64 %shr, %x
|
|
%mul = shl nsw i64 %xor, 1
|
|
%add = or i64 %mul, 1
|
|
%0 = tail call i64 @llvm.ctlz.i64(i64 %add, i1 false)
|
|
|
|
ret i64 %0
|
|
; CHECK-LABEL: clrsb64
|
|
; CHECK: cls [[TEMP:x[0-9]+]], [[TEMP]]
|
|
}
|