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8c20158fb0
SystemZTargetLowering::emitStringWrapper() previously loaded the character into R0 before the loop and made R0 live on entry. I'd forgotten that allocatable registers weren't allowed to be live across blocks at this stage, and it confused LiveVariables enough to cause a miscompilation of f3 in memchr-02.ll. This patch instead loads R0 in the loop and leaves LICM to hoist it after RA. This is actually what I'd tried originally, but I went for the manual optimisation after noticing that R0 often wasn't being hoisted. This bug forced me to go back and look at why, now fixed as r188774. We should also try to optimize null checks so that they test the CC result of the SRST directly. The select between null and the SRST GPR result could then usually be deleted as dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188779 91177308-0d34-0410-b5e6-96231b3b80d8
58 lines
1.6 KiB
LLVM
58 lines
1.6 KiB
LLVM
; Test memchr using SRST, with the correct prototype.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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declare i8 *@memchr(i8 *%src, i32 %char, i64 %len)
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; Test a simple forwarded call.
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define i8 *@f1(i64 %len, i8 *%src, i32 %char) {
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; CHECK-LABEL: f1:
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; CHECK-DAG: agr %r2, %r3
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; CHECK-DAG: llcr %r0, %r4
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; CHECK: [[LABEL:\.[^:]*]]:
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; CHECK: srst %r2, %r3
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; CHECK-NEXT: jo [[LABEL]]
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; CHECK: jl {{\.L.*}}
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; CHECK: lghi %r2, 0
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; CHECK: br %r14
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%res = call i8 *@memchr(i8 *%src, i32 %char, i64 %len)
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ret i8 *%res
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}
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; Test a doubled call with no use of %r0 in between. There should be a
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; single load of %r0.
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define i8 *@f2(i8 *%src, i8 *%charptr, i64 %len) {
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; CHECK-LABEL: f2:
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; CHECK: llc %r0, 0(%r3)
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; CHECK-NOT: %r0
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; CHECK: srst [[RES1:%r[1-5]]], %r2
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; CHECK-NOT: %r0
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; CHECK: srst %r2, [[RES1]]
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; CHECK: br %r14
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%char = load volatile i8 *%charptr
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%charext = zext i8 %char to i32
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%res1 = call i8 *@memchr(i8 *%src, i32 %charext, i64 %len)
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%res2 = call i8 *@memchr(i8 *%res1, i32 %charext, i64 %len)
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ret i8 *%res2
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}
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; Test a doubled call with a use of %r0 in between. %r0 must be loaded
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; for each loop.
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define i8 *@f3(i8 *%src, i8 *%charptr, i64 %len) {
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; CHECK-LABEL: f3:
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; CHECK: llc [[CHAR:%r[1-5]]], 0(%r3)
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; CHECK: lr %r0, [[CHAR]]
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; CHECK: srst [[RES1:%r[1-5]]], %r2
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; CHECK: lhi %r0, 0
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; CHECK: blah %r0
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; CHECK: lr %r0, [[CHAR]]
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; CHECK: srst %r2, [[RES1]]
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; CHECK: br %r14
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%char = load volatile i8 *%charptr
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%charext = zext i8 %char to i32
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%res1 = call i8 *@memchr(i8 *%src, i32 %charext, i64 %len)
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call void asm sideeffect "blah $0", "{r0}" (i32 0)
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%res2 = call i8 *@memchr(i8 *%res1, i32 %charext, i64 %len)
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ret i8 *%res2
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}
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